Patents by Inventor Brian J. Robert

Brian J. Robert has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Power electronics assemblies, insulated metal substrate assemblies, and vehicles incorporating the same
    Patent number: 9338877
    Abstract: A power electronics assembly includes a semiconductor device, an insulated metal substrate, and a cooling structure. The insulated metal substrate includes a dielectric layer positioned between first and second metal layers, and a plurality of stress-relief through-features extending through the first metal layer, the second metal layer, the dielectric layer, or combinations thereof. The semiconductor device is thermally coupled to the first metal layer and the plurality of stress relief through-features is positioned around the semiconductor device. The cooling structure is bonded directly to the second metal layer of the insulated metal substrate. Insulated metal substrate assemblies are also disclosed. The insulated metal substrate includes a plurality of stress-relief through-features extending through a first metal layer, a second metal layer, and a dielectric layer. Vehicles having power electronics assemblies with stress-relief through-features are also disclosed.
    Type: Grant
    Filed: July 9, 2014
    Date of Patent: May 10, 2016
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventor: Brian J. Robert
  • POWER ELECTRONICS ASSEMBLIES, INSULATED METAL SUBSTRATE ASSEMBLIES, AND VEHICLES INCORPORATING THE SAME
    Publication number: 20140318830
    Abstract: A power electronics assembly includes a semiconductor device, an insulated metal substrate, and a cooling structure. The insulated metal substrate includes a dielectric layer positioned between first and second metal layers, and a plurality of stress-relief through-features extending through the first metal layer, the second metal layer, the dielectric layer, or combinations thereof. The semiconductor device is thermally coupled to the first metal layer and the plurality of stress relief through-features is positioned around the semiconductor device. The cooling structure is bonded directly to the second metal layer of the insulated metal substrate. Insulated metal substrate assemblies are also disclosed. The insulated metal substrate includes a plurality of stress-relief through-features extending through a first metal layer, a second metal layer, and a dielectric layer. Vehicles having power electronics assemblies with stress-relief through-features are also disclosed.
    Type: Application
    Filed: July 9, 2014
    Publication date: October 30, 2014
    Applicant: Toyota Motor Engineering & Manufacturing North America, Inc.
    Inventor: Brian J. Robert