Abstract: A method of dynamically controlling power within a multicore CPU is disclosed and may include receiving a degree of parallelism in a workload of a zeroth core and determining whether the degree of parallelism in the workload of the zeroth core is equal to a first wake condition. Further, the method may include determining a time duration for which the first wake condition is met when the degree of parallelism in the workload of the zeroth core is equal to the first wake condition and determining whether the time duration is equal to a first confirm wake condition. The method may also include invoking an operating system to power up a first core when the time duration is equal to the first confirm wake condition.

Abstract: The aspects enable a computing device or microprocessor to determine a low power mode that provides the most system power savings by placing selected resources in a low power mode while continuing to function reliably, depending upon the resources not in use, acceptable system latencies, dynamic operating conditions (e.g., temperature), expected idle time, and the unique electrical characteristics of the particular device. Aspects provide a mechanism for determining an optimal low power configuration made up of a set of low power modes for the various resources within the computing device by determining which low power modes are valid at the time the processor enters an idle state, ranking the valid low power modes by expected power savings given the current device conditions, determining which valid low power mode provides the greatest power savings while meeting the latency requirements, and selecting a particular low power mode for each resource to enter.

Abstract: Apparatus and methods are disclosed for power optimization in a wireless device. The apparatus and methods effect monitoring the amount of data stored in a data buffer that buffers data input to and data output from a processor. Dependent on the amount of data stored in the buffers parameters of a control function, such as a Dynamic Clock and Voltage Scaling (DCVS) function are modified based on the amount of data stored in the data buffer. By modifying or pre-empting the parameters of the control function, which controls at least processor frequency, the processor can process applications more dynamically over default parameter settings, especially in situations where one or more real-time activities having strict time constraints for completion are being handled by the processor as evinced by increased buffer depth. As a result, power usage is further optimized as the control function is more responsive to processing conditions.

Abstract: A method of dynamically controlling power within a central processing unit is disclosed and may include entering an idle state, reviewing a previous busy cycle immediately prior to the idle state, and based on the previous busy cycle determining a CPU frequency for a next busy cycle.

Abstract: A method of controlling power within a multicore central processing unit (CPU) is disclosed. The method may include monitoring a die temperature, determining a degree of parallelism within a workload of the CPU, and powering one or more cores of the CPU up or down based on the degree of parallelism, the die temperature, or a combination thereof.

Abstract: A method of executing a dynamic clock and voltage scaling (DCVS) algorithm in a central processing unit (CPU) is disclosed and may include monitoring CPU activity and determining whether a workload is designated as a special workload when the workload is added to the CPU activity.

Abstract: A method of controlling power within a multicore central processing unit (CPU) is disclosed. The method may include monitoring a die temperature, determining a degree of parallelism within a workload of the CPU, and powering one or more cores of the CPU up or down based on the degree of parallelism, the die temperature, or a combination thereof.

Abstract: A method of controlling power within a multicore central processing unit (CPU) is disclosed. The method may include monitoring a die temperature, determining a degree of parallelism within a workload of the CPU, and powering one or more cores of the CPU up or down based on the degree of parallelism, the die temperature, or a combination thereof.

Abstract: A method of utilizing a node power architecture (NPA) system, the method includes receiving a request to create a client, determining whether a resource is compatible with the request, and returning a client handle when the resource is compatible with the request.

Abstract: A method of tuning a dynamic clock and voltage switching algorithm is disclosed and may include setting a default responsivity, determining whether a workload is registering after the workload is added, assigning a unique identifier to the workload if the workload is registering, and receiving a required responsivity from the workload.

Abstract: A method of controlling core clocks in a multicore central processing unit is disclosed and may include executing a zeroth dynamic clock and voltage scaling (DCVS) algorithm on a zeroth core and executing a first DCVS algorithm on a first core. The zeroth DCVS algorithm may operable to independently control a zeroth clock frequency associated with the zeroth core and the first DCVS algorithm may be operable to independently control a first clock frequency associated with the first core.

Abstract: A method and system for maximizing a quality of service (“QoS”) level in a portable computing device (“PCD”) by preempting the generation of thermal energy in excess of a threshold are disclosed. The method includes receiving a workload request for a processing component within the PCD. A processing component is selected for allocation of the workload based on thermal factors associated with the processing component. Thermal factors may comprise data indicative of real-time thermal energy generation near the processing component, predictive data derived from known characteristics of heat producing components that are physically proximate to the processing component, queued workload burdens for the processing component, etc. A processing component is selected for allocation of the workload based on the thermal factors.

Abstract: A method of executing a dynamic clock and voltage scaling (DCVS) algorithm in a central processing unit (CPU) is disclosed and may include monitoring CPU activity and determining whether a workload is designated as a special workload when the workload is added to the CPU activity.

Abstract: A method of dynamically controlling power within a multicore central processing unit is disclosed and includes executing a plurality of virtual cores, virtually executing one or more tasks, one or more threads, or a combination thereof at the virtual cores, and physically executing one or more tasks, one or more threads, or a combination thereof at a zeroth physical core. The method may further include receiving a degree of parallelism in a workload of a plurality of virtual cores and determining whether the degree of parallelism in the workload of the virtual cores is equal to a first wake condition.

Abstract: A method and system for managing resources of a portable computing device is disclosed. The method includes receiving node structure data for forming a node, in which the node structure data includes a unique name assigned to each resource of the node. A node has at least one resource and it may have multiple resources. Each resource may be a hardware or software element. The method also includes receiving marker data and creating a marker. A marker includes a legacy element such as a hardware or software element. The system includes a framework manger which handles the communications between existing nodes and markers within a node architecture. The framework manager also logs activity of each resource and marker by using its unique name. The framework manager may send this logged activity to an output device, such as a printer or a display screen.

Abstract: A method and system for determining optimal operating parameters for conserving power of a portable computing device may include plotting a hypersurface in a coordinate system. The method includes defining one or more axes in a coordinate system, such as a Cartesian coordinate system, that impact power consumption of a PCD and which may be held as constants when applied as workloads on CPU. Then, at least one axis is identified as an unknown or variable which may be optimized for power consumption. After the hypersurface containing optimized values is created for various workload scenarios for the PCD, workloads corresponding to the synthetic workloads described above are applied to the PCD. Workload predictors, like a DCVS algorithm, are executed by the PCD and are observed and compared to the hypersurface. Parameters for the workload predictor may be adjusted based on the values from the hypersurface.

Abstract: A method and system for dynamically creating and servicing master-slave pairs within and across switch fabrics of a portable computing device (“PCD”) are described. The system and method includes receiving a client request comprising a master-slave pair and conducting a search for a slave corresponding to the master-slave pair. A route for communications within and across switch fabrics is created and that corresponds to the master-slave pair. One or more handles or arrays may be stored in a memory device that correspond to the created route. Next, bandwidth across the route may be set. After the bandwidth across the newly created route is set, the client request originating the master-slave pair may be serviced using the created route. Conducting the search for the slave may include comparing unique identifiers assigned to each slave in a master-slave hierarchy.

Abstract: The aspects enable a computing device or microprocessor to determine a low power mode that provides the most system power savings by placing selected resources in a low power mode while continuing to function reliably, depending upon the resources not in use, acceptable system latencies, dynamic operating conditions (e.g., temperature), expected idle time, and the unique electrical characteristics of the particular device. Aspects provide a mechanism for determining an optimal low power configuration made up of a set of low power modes for the various resources within the computing device by determining which low power modes are valid at the time the processor enters an idle state, ranking the valid low power modes by expected power savings given the current device conditions, determining which valid low power mode provides the greatest power savings while meeting the latency requirements, and selecting a particular low power mode for each resource to enter.

Abstract: A mobile device, a method for managing and exposing a set of performance scaling algorithms on the device, and a computer program product are disclosed. The mobile device includes a multiple-core processor communicatively coupled to a non-volatile memory. The non-volatile memory includes a set of programs defined by a respective combination of a performance scaling algorithm and a set of parameters, a startup program that when executed by the multiple-core processor identifies at least one member of the set of programs suitable for monitoring operation of the mobile device and scaling the performance of an identified processor core and an application programming interface that exposes the set of programs.

Abstract: Systems and methods for measuring the effectiveness of a workload predictor operative on a mobile device are disclosed. A load manager includes a workload predictor, a sensor, an error generator and a controller. The workload predictor generates an estimate of the workload on a processor core operative on the mobile device. The sensor generates a measure of the actual workload on the processor core. The error generator receives the estimate of the workload and the measure of the actual workload on the processor core and generates an error signal. The controller receives the error signal and determines the effectiveness of the workload predictor as a function of the error signal over time.