Patents by Inventor Brian Jason Karguth

Brian Jason Karguth has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated circuit device with multiple direct memory access (DMA) data paths
    Patent number: 11907145
    Abstract: An integrated circuit (IC) includes first and second memory devices and a bridge. The IC also includes a first interconnect segment coupled between the first memory device and the bridge. The IC further includes a second interconnect segment coupled between the first and second memory devices, and a third interconnect segment coupled between the bridge and the second memory device. The IC includes a first DMA circuit coupled to the first interconnect segment, and a second DMA circuit coupled to the second interconnect segment. A fourth interconnect segment is coupled between the first and second DMA circuits.
    Type: Grant
    Filed: October 24, 2022
    Date of Patent: February 20, 2024
    Assignee: Texas Instruments Incorporated
    Inventors: Brian Jason Karguth, Charles Lance Fuoco, Samuel Paul Visalli, Michael Anthony Denio
  • SPLIT DIRECT MEMORY ACCESS (DMA)
    Publication number: 20230042413
    Abstract: An integrated circuit (IC) includes first and second memory devices and a bridge. The IC also includes a first interconnect segment coupled between the first memory device and the bridge. The IC further includes a second interconnect segment coupled between the first and second memory devices, and a third interconnect segment coupled between the bridge and the second memory device. The IC includes a first DMA circuit coupled to the first interconnect segment, and a second DMA circuit coupled to the second interconnect segment. A fourth interconnect segment is coupled between the first and second DMA circuits.
    Type: Application
    Filed: October 24, 2022
    Publication date: February 9, 2023
    Inventors: Brian Jason KARGUTH, Charles Lance FUOCO, Samuel Paul VISALLI, Michael Anthony DENIO
  • Split direct memory access (DMA) with streaming interconnect
    Patent number: 11481345
    Abstract: An integrated circuit (IC) includes first and second memory devices and a bridge. The IC also includes a first interconnect segment coupled between the first memory device and the bridge. The IC further includes a second interconnect segment coupled between the first and second memory devices, and a third interconnect segment coupled between the bridge and the second memory device. The IC includes a first DMA circuit coupled to the first interconnect segment, and a second DMA circuit coupled to the second interconnect segment. A fourth interconnect segment is coupled between the first and second DMA circuits.
    Type: Grant
    Filed: November 17, 2020
    Date of Patent: October 25, 2022
    Assignee: Texas Instruments Incorporated
    Inventors: Brian Jason Karguth, Charles Lance Fuoco, Samuel Paul Visalli, Michael Anthony Denio
  • SPLIT DIRECT MEMORY ACCESS (DMA)
    Publication number: 20210073150
    Abstract: An integrated circuit (IC) includes first and second memory devices and a bridge. The IC also includes a first interconnect segment coupled between the first memory device and the bridge. The IC further includes a second interconnect segment coupled between the first and second memory devices, and a third interconnect segment coupled between the bridge and the second memory device. The IC includes a first DMA circuit coupled to the first interconnect segment, and a second DMA circuit coupled to the second interconnect segment. A fourth interconnect segment is coupled between the first and second DMA circuits.
    Type: Application
    Filed: November 17, 2020
    Publication date: March 11, 2021
    Inventors: Brian Jason KARGUTH, Charles Lance FUOCO, Samuel Paul VISALLI, Michael Anthony DENIO
  • Split direct memory access (DMA)
    Patent number: 10838896
    Abstract: An integrated circuit (IC) includes first and second memory devices and a bridge. The IC also includes a first interconnect segment coupled between the first memory device and the bridge. The IC further includes a second interconnect segment coupled between the first and second memory devices, and a third interconnect segment coupled between the bridge and the second memory device. The IC includes a first DMA circuit coupled to the first interconnect segment, and a second DMA circuit coupled to the second interconnect segment. A fourth interconnect segment is coupled between the first and second DMA circuits.
    Type: Grant
    Filed: October 14, 2019
    Date of Patent: November 17, 2020
    Assignee: Texas Instruments Incorporated
    Inventors: Brian Jason Karguth, Charles Lance Fuoco, Samuel Paul Visalli, Michael Anthony Denio
  • SPLIT DIRECT MEMORY ACCESS (DMA)
    Publication number: 20200117626
    Abstract: An integrated circuit (IC) includes first and second memory devices and a bridge. The IC also includes a first interconnect segment coupled between the first memory device and the bridge. The IC further includes a second interconnect segment coupled between the first and second memory devices, and a third interconnect segment coupled between the bridge and the second memory device. The IC includes a first DMA circuit coupled to the first interconnect segment, and a second DMA circuit coupled to the second interconnect segment. A fourth interconnect segment is coupled between the first and second DMA circuits.
    Type: Application
    Filed: October 14, 2019
    Publication date: April 16, 2020
    Inventors: Brian Jason KARGUTH, Charles Lance FUOCO, Samuel Paul VISALLI, Michael Anthony DENIO
  • On-chip interconnect fabric
    Patent number: 8171186
    Abstract: A method for performing write transactions in an interconnect fabric is described. A burst write transaction is received by a bridge coupled to a master. The burst transaction is initiated by a command phase that includes a wait state attribute. The bridge is also coupled to a second bus that is coupled to a slave destination device or to another bridge. The bridge may initiate a cut-through transaction to the second bus when the wait state attribute indicates a master inserted wait state will not be incurred during the burst transaction.
    Type: Grant
    Filed: January 31, 2011
    Date of Patent: May 1, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Brian Jason Karguth, Denis Roland Beaudoin, Akila Subramaniam