Abstract: An apparatus, system, and method are provided for updating a code image. The apparatus, system, and method include a loader for loading a new code image into a temporary memory location separate from the memory location occupied by the old code image. A conversion module of the new code image executes and selectively reconciles incompatibilities between the old code image and the new code image. In one aspect, once incompatibilities are reconciled, a copy module copies the new code image into the memory space occupied by the old code image.

Abstract: An apparatus, system, and method are disclosed for communicating binary data using a self-descriptive binary data structure. The binary data structure also may be referred to as a microcode reconstruct and boot (MRB) image. The binary data structure includes a plurality of data segments, a target data set, and a data structure descriptor. Each of the data segments has a data segment header and data field. The target data set is stored within the data field and may be an executable. The data structure descriptor is descriptive of the binary data structure and identifies the location of the target data set within the data field. The binary data structure is self-descriptive in that the location of an individual target data set may be identified by the data structure descriptor.

Abstract: An apparatus, system, and method are disclosed for fastload code update on a communications adapter. The apparatus includes an image load module, a memory initialization module, and an image overlay module. The image load module is configured to load a copy of a new code image in a memory on the communications adapter. The memory also concurrently stores a copy of an old code image used by the communications adapter. The memory initialization module is configured to invoke the new code image to perform a memory initialization operation. The memory initialization module may perform the memory initialization operation concurrently with ongoing I/O requests possibly accepted, but not necessarily processed, by the old code image. The image overlay module is configured to overlay the old code image with the new code image. The fastload code update minimizes the time that the communications adapter is off-line to overlay the old code image with the new code image and reinitialize the communications adapter.

Abstract: Disclosed is a technique for throttling data transfer. An amount of resources that are in use is determined. When the amount of resources reaches a high threshold, one or more primary control units are notified to temporarily stop sending data. When the amount of resources reaches a low threshold, each previously notified primary control unit is notified to resume sending data.

Abstract: A method to simultaneously configure a plurality of adapters disposed within a computer system, where that computer system includes one or more external computers, and/or one or more data input devices, and/or one or more data output devices, and/or one or more data storage devices. A computer system which includes a computer useable medium having computer readable program code disposed therein to implement Applicants' method to simultaneously configure a plurality of adapters disposed within said computer system. A computer program product usable with a programmable computer processor having computer readable program code embodied therein for simultaneously configuring a plurality of adapters disposed within a computer system.

Abstract: A method to simultaneously configure a plurality of adapters disposed within a computer system, where that computer system includes one or more external computers, and/or one or more data input devices, and/or one or more data output devices, and/or one or more data storage devices. A computer system which includes a computer useable medium having computer readable program code disposed therein to implement Applicants' method to simultaneously configure a plurality of adapters disposed within said computer system. A computer program product usable with a programmable computer processor having computer readable program code embodied therein for simultaneously configuring a plurality of adapters disposed within a computer system.

Abstract: A system and method for organizing compressed data on a storage disk to increase storage density. The method and system include a compressor for compressing a data block into a compressed data block, wherein N represents a compression ratio. The storage disk includes a first storage partition having N slots for storing compressed data, and a second storage partition also having N slots for storing overflow data. Each of the N slots in the first partition includes at least one address pointer for pointing to locations in the second partition. According to a further aspect of the system and method, if the compressed data block is less than or equal to 1/N of the data block size, then the compressed data block is stored in a first slot in the first storage partition.

Abstract: A system and method for organizing compressed data and uncompressed data in a storage system. The method and system include a compressor for compressing a data block into a compressed data block, wherein N represents a compression ratio. The storage disk includes a first disk partition having N slots for storing compressed data, and a second disk partition for storing uncompressed data. A portion of the N slots in the first partition include address pointers for pointing to locations in the second disk partition containing the uncompressed data.