Abstract: Clock data recovery broadcast for multi-lane SerDes is disclosed. In some implementations, a serial input/output (I/O) interface includes a master lane and a plurality of slave lanes to receive serial incoming data. The master lane has a master clock and data recovery (CDR) module to generate master data sample clock control signals. The master data sample clock control signals can be broadcasted to the slave lanes. Furthermore, each of the plurality of slave lanes having a slave CDR module. The slave CDR module can include a clock edge tracking module to generate local data sample clock control signals, and a multiplexer to select the master data sample clock control signals or local data sample clock control signals to apply in the respective slave lane in response to a signal from a CDR controller indicative of a low power mode.

Abstract: Clock data recovery broadcast for multi-lane SerDes is disclosed. In some implementations, a serial input/output (I/O) interface includes a master lane and a plurality of slave lanes to receive serial incoming data. The master lane has a master clock and data recovery (CDR) module to generate master data sample clock control signals. The master data sample clock control signals can be broadcasted to the slave lanes. Furthermore, each of the plurality of slave lanes having a slave CDR module. The slave CDR module can include a clock edge tracking module to generate local data sample clock control signals, and a multiplexer to select the master data sample clock control signals or local data sample clock control signals to apply in the respective slave lane in response to a signal from a CDR controller indicative of a low power mode.

Abstract: Providing memory bandwidth compression using back-to-back read operations by compressed memory controllers (CMCs) in a central processing unit (CPU)-based system is disclosed. In this regard, in some aspects, a CMC is configured to receive a memory read request to a physical address in a system memory, and read a compression indicator (CI) for the physical address from error correcting code (ECC) bits of a first memory block in a memory line associated with the physical address. Based on the CI, the CMC determines whether the first memory block comprises compressed data. If not, the CMC performs a back-to-back read of one or more additional memory blocks of the memory line in parallel with returning the first memory block. Some aspects may further improve memory access latency by writing compressed data to each of a plurality of memory blocks of the memory line, rather than only to the first memory block.

Abstract: A method, circuit and system for altering the power consumption in communication links. A type of noise and an amount of jitter in a signal transmitted across a communication link is measured. Upon determining the contribution of the measured noise to the measured jitter in the signal, the measured noise is classified based on such contribution and the intensity of the measured jitter. The power consumption in a component(s) of the communication link may be adjusted based on the classification of the measured noise. For example, if the measured noise is classified as being a low amount of noise, then the power consumption of the component(s) may be reduced such as by lowering the voltage of the power supply and/or reducing the complexity of the circuitry. By reducing the power consumption when the communication link is not subject to the worst-case condition, a savings in power consumption may be made.

Abstract: A method, circuit and system for altering the power consumption in communication links. A type of noise and an amount of jitter in a signal transmitted across a communication link is measured. Upon determining the contribution of the measured noise to the measured jitter in the signal, the measured noise is classified based on such contribution and the intensity of the measured jitter. The power consumption in a component(s) of the communication link may be adjusted based on the classification of the measured noise. For example, if the measured noise is classified as being a low amount of noise, then the power consumption of the component(s) may be reduced such as by lowering the voltage of the power supply and/or reducing the complexity of the circuitry. By reducing the power consumption when the communication link is not subject to the worst-case condition, a savings in power consumption may be made.

Abstract: A method, circuit and system for altering the power consumption in communication links. A type of noise and an amount of jitter in a signal transmitted across a communication link is measured. Upon determining the contribution of the measured noise to the measured jitter in the signal, the measured noise is classified based on such contribution and the intensity of the measured jitter. The power consumption in a component(s) of the communication link may be adjusted based on the classification of the measured noise. For example, if the measured noise is classified as being a low amount of noise, then the power consumption of the component(s) may be reduced such as by lowering the voltage of the power supply and/or reducing the complexity of the circuitry. By reducing the power consumption when the communication link is not subject to the worst-case condition, a savings in power consumption may be made.

Abstract: A networked conferencing system is described wherein multiple moderation of conferences is accommodated by permitting a conference moderator to designate one ore more alternate conference moderators. Each alternate moderator has access to at least a subset of conference moderation functions, thereby permitting any alternate moderator to take at least partial control of conference proceedings in the absence of the “main” or “primary” moderator.