Patents by Inventor Brian Joseph Thome

Brian Joseph Thome has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8041998
    Abstract: A method and/or a system of a processor-agnostic encoded debug architecture in a pipelined environment is disclosed. In one embodiment, a method of a processor includes processing an event specified by a data processing system coupled to the processor to determine a boundary of the event, generating a matrix having combinations of the event and other events occurring simultaneously in the processor, capturing an output data of observed ones of the event and other events, and applying the matrix to generate an encoded debug data of the output data. The method may also include determining which of the combinations are valid based on an architecture of the processor. The event may be a trace-worthy event whose output value cannot be reliably predicted in an executable file in the data processing system and/or a sync event that is specified by a user of the data processing system.
    Type: Grant
    Filed: February 1, 2010
    Date of Patent: October 18, 2011
    Assignee: Texas Instruments Incorporated
    Inventors: Dipan Kumar Mandal, Brian Joseph Thome
  • Publication number: 20100131744
    Abstract: A method and/or a system of a processor-agnostic encoded debug architecture in a pipelined environment is disclosed. In one embodiment, a method of a processor includes processing an event specified by a data processing system coupled to the processor to determine a boundary of the event, generating a matrix having combinations of the event and other events occurring simultaneously in the processor, capturing an output data of observed ones of the event and other events, and applying the matrix to generate an encoded debug data of the output data. The method may also include determining which of the combinations are valid based on an architecture of the processor. The event may be a trace-worthy event whose output value cannot be reliably predicted in an executable file in the data processing system and/or a sync event that is specified by a user of the data processing system.
    Type: Application
    Filed: February 1, 2010
    Publication date: May 27, 2010
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Dipan Kumar Mandal, Brian Joseph Thome