Abstract: A plasma processing chamber for depositing a film on an underside surface of a wafer, includes showerhead pedestal. The showerhead pedestal includes a first zone and a second zone. An upper separator fin is disposed over a top surface of the showerhead pedestal and a lower separator fin is disposed under the top surface of the showerhead pedestal and aligned with the upper separator fin. The first zone is configured for depositing a first film to the underside surface of the wafer and the second zone is configured for depositing a second film to the underside surface of the wafer. In another embodiment, a top surface of the showerhead pedestal may be configured to receive a masking plate instead of the upper separator fin. The masking plate is configured with a first area that has openings and a second area that is masked. The first areas is used to provide the process gas to a portion of the underside surface of the wafer for depositing a film.

Abstract: A detector for detecting the removal and/or insertion of a weapon out of and/or into a holster. The detector may transmit a message each time the weapon is removed from the holster. A recording system may receive the message and determine whether or not it will begin recording the data it captures. A detector may detect the change in a magnitude of an inductance and/or an impedance of a circuit to detect insertion and removal of the weapon into and out of the holster. The holster is configured to couple to the detector to position the detector to detect insertion and removal of the weapon. An adhesive tape may couple a detector to a holster.

Abstract: Various carrier ring designs and configurations to control an amount of deposition at a wafer's front side and bevel edge are provided. The carrier ring designs can control the amount of deposition at various locations of the wafer while deposition is performed on the wafer's back side, with no deposition desired on the front side of the wafer. These locations include front side, edge, and back side of bevel; and front and back side of the wafer. Edge profiles of the carrier rings are designed to control flow of process gases, flow of front side purge gas, and plasma effects. In some designs, through holes are added to the carrier rings to control gas flows. The edge profiles and added features can reduce or eliminate deposition at the wafer's front side and bevel edge.

Abstract: Various embodiments herein relate to systems and methods for predictive maintenance for semiconductor manufacturing equipment.

Abstract: Various carrier ring designs and configurations to control an amount of deposition at a wafer's front side and bevel edge are provided. The carrier ring designs can control the amount of deposition at various locations of the wafer while deposition is performed on the wafer's back side, with no deposition desired on the front side of the wafer. These locations include front side, edge, and back side of bevel; and front and back side of the wafer. Edge profiles of the carrier rings are designed to control flow of process gases, flow of front side purge gas, and plasma effects. In some designs, through holes are added to the carrier rings to control gas flows. The edge profiles and added features can reduce or eliminate deposition at the wafer's front side and bevel edge.

Abstract: Various carrier ring designs and configurations to control an amount of deposition at a wafer's front side and bevel edge are provided. The carrier ring designs can control the amount of deposition at various locations of the wafer while deposition is performed on the wafer's back side, with no deposition desired on the front side of the wafer. These locations include front side, edge, and back side of bevel; and front and back side of the wafer. Edge profiles of the carrier rings are designed to control flow of process gases, flow of front side purge gas, and plasma effects. In some designs, through holes are added to the carrier rings to control gas flows. The edge profiles and added features can reduce or eliminate deposition at the wafer's front side and bevel edge.

Abstract: In some examples, a faceless showerhead comprises a body including a backing plate, the body devoid of a faceplate or plenum; a gas supply stem to admit gas into the showerhead; and a baffle supported adjacent the backing plate or the gas supply stem. The faceless showerhead may further comprise at least one support element for supporting the baffle in a baffle cavity in the backing plate or the gas supply stem.

Abstract: A substrate processing system includes a showerhead pedestal, a carrier ring, a showerhead, and an RF source. The showerhead pedestal includes a top surface defining a first plurality of through holes configured to output a plasma gas mixture. The carrier ring is arranged on the top surface of the showerhead pedestal to support a substrate at a predetermined distance from the top surface of the showerhead pedestal. The showerhead is arranged above the carrier ring and includes a body defining a plenum, a recessed region located on a substrate-facing surface of the body, and a second plurality of through holes extending from the plenum through the substrate-facing surface of the body in the recessed region to disperse a purge gas onto a top surface of the substrate. The RF source is configured to strike plasma between a bottom surface of the substrate and the top surface of the showerhead pedestal.

Abstract: A system includes a plurality of spindle arms located above a plurality of stations in a processing chamber to transport a semiconductor substrate between the stations. The spindle arms reside in the processing chamber during processing of the semiconductor substrate. The system comprises first gas lines arranged below the stations to supply a purge gas. The system comprises second gas lines extending upwards from the first gas lines to supply the purge gas to the spindle arms during the processing of the semiconductor substrate in the processing chamber.

Abstract: A plasma processing chamber for depositing a film on an underside surface of a wafer, includes showerhead pedestal. The showerhead pedestal includes a first zone and a second zone. An upper separator fin is disposed over a top surface of the showerhead pedestal and a lower separator fin is disposed under the top surface of the showerhead pedestal and aligned with the upper separator fin. The first zone is configured for depositing a first film to the underside surface of the wafer and the second zone is configured for depositing a second film to the underside surface of the wafer. In another embodiment, a top surface of the showerhead pedestal may be configured to receive a masking plate instead of the upper separator fin. The masking plate is configured with a first area that has openings and a second area that is masked. The first areas is used to provide the process gas to a portion of the underside surface of the wafer for depositing a film.

Abstract: Methods and apparatuses are provided herein for independently adjusting flowpath conductance. One multi-station processing apparatus may include a processing chamber, a plurality of process stations in the processing chamber that each include a showerhead having a gas inlet, and a gas delivery system including a junction point and a plurality of flowpaths, in which each flowpath includes a flow element, includes a temperature control unit that is thermally connected with the flow element and that is controllable to change the temperature of that flow element, and fluidically connects one corresponding gas inlet of a process station to the junction point such that each process station of the plurality of process stations is fluidically connected to the junction point by a different flowpath.

Abstract: Various carrier ring designs and configurations to control an amount of deposition at a wafer's front side and bevel edge are provided. The carrier ring designs can control the amount of deposition at various locations of the wafer while deposition is performed on the wafer's back side, with no deposition desired on the front side of the wafer. These locations include front side, edge, and back side of bevel; and front and back side of the wafer. Edge profiles of the carrier rings are designed to control flow of process gases, flow of front side purge gas, and plasma effects. In some designs, through holes are added to the carrier rings to control gas flows. The edge profiles and added features can reduce or eliminate deposition at the wafer's front side and bevel edge.

Abstract: Various carrier ring designs and configurations to control an amount of deposition at a wafer's front side and bevel edge are provided. The carrier ring designs can control the amount of deposition at various locations of the wafer while deposition is performed on the wafer's back side, with no deposition desired on the front side of the wafer. These locations include front side, edge, and back side of bevel; and front and back side of the wafer. Edge profiles of the carrier rings are designed to control flow of process gases, flow of front side purge gas, and plasma effects. In some designs, through holes are added to the carrier rings to control gas flows. The edge profiles and added features can reduce or eliminate deposition at the wafer's front side and bevel edge.