Abstract: Methods and digital circuits providing frequency correction to frequency synthesizers are disclosed. Dual switched-capacitor peak detectors connected to an input signal periodically sample the voltage of the input signal, and then determine a fundamental frequency of the input signal from the output of the dual switched-capacitor peak detectors. Both the sample period and the decay time of the dual switched-capacitor peak detectors are proportional to a time period between a previous pair of voltage peaks detected in the input signal. This makes the peak detectors immune to lower-amplitude oscillations which are often present within a single fundamental cycle in musical signals with strong harmonic components which might otherwise cause errors in frequency estimation. This is done without causing unwanted sluggishness in the transient response of the frequency detection process.

Abstract: A frequency synthesizer for a WLAN transceiver is disclosed that may be used to generate 5.4 GHz and 2.4 GHz signals. The frequency synthesizer may be configured to minimize VCO pulling by using VCO operating frequencies that are not integer multiples of the RF bands. Further, the frequency synthesizer may be configured to minimize interference with other frequency bands used by existing wireless systems.

Abstract: A frequency synthesizer for a WLAN transceiver is disclosed that may be used to generate 5.4 GHz and 2.4 GHz signals. The frequency synthesizer may be configured to minimize VCO pulling by using VCO operating frequencies that are not integer multiples of the RF bands. Further, the frequency synthesizer may be configured to minimize interference with other frequency bands used by existing wireless systems.

Abstract: A fast settling frequency synthesizer is disclosed. The particular capacitor to frequency relationship in the band of operation is first determined. The calculation can be performed by determining the capacitor to frequency relationship at two points and calculating the slope. Once these parameters are known, then, for any change in frequency due to a channel hop, the appropriate capacitor value can be determined.

Abstract: A fast settling frequency synthesizer is disclosed. The particular capacitor to frequency relationship in the band of operation is first determined. The calculation can be performed by determining the capacitor to frequency relationship at two points and calculating the slope. Once these parameters are known, then, for any change in frequency due to a channel hop, the appropriate capacitor value can be determined.

Abstract: A transceiver for use in a wireless device. The transceiver may include a receive portion for receiving an input RF signal. The receive portion may include at least one receive filter which may include a first filter. The transceiver may also include a transmit portion for transmitting an output RF signal. The transmit portion may include at least one transmit filter, which may include the first filter used in the receive portion. The transceiver may further include a plurality of switches, which may include a first switch coupled to an input of the first filter and a second switch coupled to an output of the first filter. The plurality of switches may be configurable to enable use of the first filter in the receive portion for receiving the input RF signal and use of the first filter in the transmit portion for transmitting the output RF signal.

Abstract: A VCO comprises an LC tank circuit coupled to a plurality of cross-coupled transistor devices. A first resonance frequency of a waveform output of the VCO is dependent upon the values of a first capacitor and a first inductor of the LC tank. The VCO further comprises a first series LC resonator comprising a second capacitor and a second inductor in parallel to the first capacitor and the first inductor. The values of the second capacitor and second inductor are selected to produce a second resonance frequency that is a third harmonic of the first resonance frequency, thereby increasing a slope of the voltage controlled oscillator output. The increased slope reduces phase noise, which leads to improved signal-to-noise ratio.

Abstract: A transceiver includes a power control circuit in the transmitter that operates on a packet-by-packet basis. The transceiver can, for each packet, set a variable gain amplifier to a first gain and use predetermined gain increments to thereafter increase gain until a gain hold event. The gain hold event can be an expiration of a time duration allocated for changing gain or a desired power being reached, whichever event occurs first. The gain can be adjusted by a predetermined amount based on an operating condition.

Abstract: A channel select filter circuit is disclosed using a current-mode transconductance-capacitor (gm-C) architecture, which is tuned by digitally controlled capacitor arrays. The main filter includes at least one transconductor-capacitor (gm-C) filter and a transresistance amplifier. A replica transconductor-capacitor (gm-C) filter and a phase detector are used to establish any phase shift in an input signal, and a state machine adjusts capacitor arrays in the the replica transconductor-capacitor (gm-C) filter and the at least one transconductor-capacitor (gm-C) filter in order to set a cut-off frequency of the channel select filter.

Abstract: The present invention includes a transceiver and a method of operating the same that includes in the transmitter a power control circuit that operates on an analog differential signal containing data packets individually. The power control circuit initially transmits a series of data symbols with known values, periodically strobes the transceiver system for correct power levels and incrementally increases the power level of the transceiver until the optimal gain is reached, without exceeding the maximum output power.

Abstract: A channel select filter circuit is disclosed using a current-mode transconductance-capacitor (gm-C) architecture, which is tuned by digitally controlled capacitor arrays. The main filter includes at least one transconductor-capacitor (gm-C) filter and a transresistance amplifier. A replica transconductor-capacitor (gm-C) filter and a phase detector are used to establish any phase shift in an input signal, and a state machine adjusts capacitor arrays in the the replica transconductor-capacitor (gm-C) filter and the at least one transconductor-capacitor (gm-C) filter in order to set a cut-off frequency of the channel select filter.