Abstract: The invention provides an ASIC architecture that incorporates an SSCG module therein and that utilizes both a frequency modulated clock signal and a pure clock signal, where both clock signals are substantially synchronized and where the ASIC architecture minimizes the number of pins and silicon area needed to provide the dual clock signals. Additionally, because the clock signals are derived from the same externally generated clock signal and are received into the ASIC through the same clock input buffer, the clock signals on both branch paths will be substantially synchronized, thereby reducing drift, skew or delay errors in the clock I/O buffers, between the various sections of the integrated circuit and/or between the various components coupled to, or part of the electronic device in which the integrated circuit is a part.

Abstract: A memory module, a printer assembly, and a method for storing a computer code for a printer-controller application specific integrated circuit (ASIC) having a non-ROM memory control. The memory module has ROM memory cells and a non-ROM to ROM interface operatively connected to the ROM memory cells. The printer assembly has the above-described ASIC, the above-described memory module, and a transmission cable operatively connected to the non-ROM memory control of the ASIC and the non-ROM to ROM interface of the memory module. The method stores non-final versions of the computer code in a memory module having non-ROM memory cells, which allows the code to be changed during development, and stores the final version of the computer code in the above-described memory module having the ROM memory cells.

Abstract: A multiple output spread spectrum clock circuit is provided that reduces electromagnetic emissions when two different clocks operate at frequencies which overlap one another. Two such clock circuits are controlled so as to introduce a phase difference between the clocks as they operate through their spread spectrum profiles. The “best” phase differences are around 18%, or around 50%, between adjacent spread spectrum clock outputs. The phase difference can be controlled by starting the first clock (SSCG #1) at one point in time, while temporarily delaying the start of the second clock (SSCG #2) until the appropriate moment; alternatively, it can be controlled by starting both clocks at the same moment in time, however, SSCG #1 begins at one point in the spread spectrum profile, while SSCG #2 begins at a different point in its spread spectrum profile.

Abstract: A system identifies faulty ink jet nozzles among a plurality of ink jet nozzles in an ink jet print head based on evaluation of a test pattern printed by the print head. The printed test pattern consists of test images, where each of the test images is printed by a corresponding one of the plurality of ink jet nozzles. The test images occupy locations within the test pattern indicated by location coordinates. The test pattern is visually inspected to identify empty locations within the test pattern, where an empty location is a location in the test pattern not occupied by a test image. The empty locations are designated according to the location coordinates of the empty locations. The location coordinates of the empty locations are then correlated to ink jet nozzles that, if functioning properly, would have printed test images at the empty locations. The ink jet nozzles that, if functioning properly, would have printed test images at the empty locations are designated as faulty.

Abstract: An inkjet printhead having a plurality of ink discharge nozzles that are served by respective ink supply conduits formed within a composite substrate includes ink discharge heaters respective to each of the nozzles, one or more substrate heaters for preheating an ink flow within the supply conduits and a plurality of resistors for monitoring the printhead quality during manufacture. The ink discharge heaters are in circuit with a first energy source connection and a common ground connection. The quality monitoring resistors are in series circuit with a second energy source connection and the common ground connection respective to the ink discharge heaters. At least one substrate heater is in circuit with a third energy source connection and the second energy source connection which, when the printhead is operatively connected for printing, is connected to ground.