Patents by Inventor Brian L. Borgeson

Brian L. Borgeson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6553390
    Abstract: The present invention provides for a method and an apparatus for simultaneous online access of volume-managed data storage. A portion of a storage media to be mirrored is identified. An independent disk-mirror split-off process on the identified portion of the storage media to be mirrored is performed to produce a data mirror that is capable of being independently accessed.
    Type: Grant
    Filed: November 14, 2000
    Date of Patent: April 22, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Danny Brice Gross, Michael Douglas O'Donnell, Brian L. Borgeson
  • Patent number: 6327703
    Abstract: The invention is a method and apparatus for linking to a file in an operating system. In one aspect, the method includes defining a virtual variable; creating a variable symbolic link referencing a file using the virtual variable; referencing the file by the virtual variable; and expanding the virtual variable to identify the referenced file. In another aspect, the apparatus includes a computer-readable, program storage device encoded with instructions that, when executed by a computer, perform a method in accordance with the invention. In yet another aspect, the apparatus includes a computer programmed to perform a method in accordance with the invention.
    Type: Grant
    Filed: February 26, 1999
    Date of Patent: December 4, 2001
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Michael D. O'Donnell, Danny B. Gross, Brian L. Borgeson
  • Patent number: 6263353
    Abstract: A method and apparatus for converting digital data representations, such as network addresses of different computer networks. Input data, which in one embodiment includes a hexadecimal network address, contains a plurality of bytes, with each byte having a plurality of digits arranged in positions. A first set of digits from the bytes is selected having a first digit position. The digits in the first set are shifted to a second digit position to generate a first resultant. A second set of digits is selected having a third digit position. The digits in the second set are shifted to a fourth digit position to generate a second resultant. The first and second resultants are summed to generate a converted output network address.
    Type: Grant
    Filed: February 17, 1999
    Date of Patent: July 17, 2001
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Danny B. Gross, Michael D. O'Donnell, Brian L. Borgeson