Patents by Inventor Brian M. Ditchek
Brian M. Ditchek has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 5285090Abstract: Electrical ohmic contacts are made to a matrix of silicon having conductive rods embedded therein without making contact to any of the rods. Those rods which extend to the surface in the selected area of the matrix to be contacted are etched to form holes. The holes are filled with insulating polycrystalline silicon. The region of the selected area is heavily doped, and an ohmic contact member is made thereto. The underlying rods are spaced from the ohmic contact member and the heavily-doped region by intervening polycrystalline silicon.Type: GrantFiled: February 6, 1992Date of Patent: February 8, 1994Assignee: GTE Laboratories IncorporatedInventors: Brian M. Ditchek, Marvin Tabasky
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Patent number: 5211707Abstract: A field emission cathode having a parallel array of individual electrically conductive rods of metal silicide or germanide in a silicon-based or germanium-based single crystal matrix. Each rod has an emission end exposed at one major surface of the cathode and an ohmic contact end exposed at an opposite major surface. In a preferred cathode, the matrix and rod materials are the constituents of a eutectic composition. The cathode is fabricated by a process involving producing a composite boule from a eutectic composition of a silicon-based or germanium-based material and a metal. The composite cathode body is cut from the boule so that the rods are generally normal to the major surfaces. Etching may be used to expose a uniform length of the rods at the emitting surface.Type: GrantFiled: July 11, 1991Date of Patent: May 18, 1993Assignee: GTE Laboratories IncorporatedInventors: Brian M. Ditchek, Mark A. Neifeld, John C. Gustafson
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Patent number: 5111254Abstract: A junction field effect transistor having an array of electrically floating gate elements located between the control gate and the drain in the path of current flow from the source to the drain. As the drain voltage increases the depletion zone of the control gate expands until it reaches the nearest floating gate. The maximum electric field at the control gate is clamped while the nearest floating gate increases in potential and its depletion zone expands toward the next floating gate, and so on. In this way the applied voltage is spread over the array of floating gates clamping the maximum electric field at a value that is less than the avalanche breakdown field. Then, the avalanche breakdown voltage of the device is increased.Type: GrantFiled: August 17, 1990Date of Patent: May 5, 1992Assignee: GTE Laboratories IncorporatedInventors: Mark Levinson, Brian M. Ditchek, Philip G. Rossoni, Frederick Rock
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Patent number: 5098862Abstract: Electrical ohmic contacts are made to a matrix of silicon having conductive rods embedded therein without making contact to any of the rods. Those rods which extend to the surface in the selected area of the matrix to be contacted are etched to form holes. The holes are filled with insulating polycrystalline silicon. The region of the selected area is heavily doped, and an ohmic contact member is made thereto. The underlying rods are spaced from the ohmic contact member and the heavily-doped region by intervening polycrystalline silicon.Type: GrantFiled: November 7, 1990Date of Patent: March 24, 1992Assignee: GTE Laboratories IncorporatedInventors: Brian M. Ditchek, Marvin Tabasky
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Patent number: 4984037Abstract: A semiconductor device, specifically an FET, having a body which includes a matrix of semiconductor material, specifically silicon, having an array of individual rods of conductive material, specifically TaSi.sub.2, disposed therein. The rods form Schottky barriers with the semiconductor material. A gate contact is made to several of the rods at one end, and source and drain contacts are made to the matrix of semicondcutor material. Current flow in the semiconductor material of the matrix between the source and the drain is controlled by applying biasing potential to the gate contact to enlarge the depletion zones around the rods.Type: GrantFiled: December 11, 1986Date of Patent: January 8, 1991Assignee: GTE Laboratories IncorporatedInventors: Brian M. Ditchek, Adrian I. Cogan, Enid K. Sichel, Walter L. Bloss, III
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Patent number: 4829173Abstract: A semiconductor photodetector having a body which includes a matrix of semiconductor material, specifically silicon, having an array of individual rods of conductive material, specifically TaSi.sub.2, disposed therein. The rods form Schottky barriers with the semiconductor material. An ohmic contact is made to several of the rods at one end, and an ohmic contact is made to the semiconductor material of the matrix. Incident radiation is directed at a surface of the body containing the opposite ends of the rods. A detector is connected between the two ohmic contacts and detects current flow generated in response to incident radiation impinging on the body.Type: GrantFiled: March 2, 1987Date of Patent: May 9, 1989Assignee: GTE Laboratories IncorporatedInventors: Brian M. Ditchek, Mark Levinson, Ben G. Yacobi
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Patent number: 4794438Abstract: A semiconductor radiation detector having a body which includes a matrix of semiconductor material, specifically silicon, having an array of individual rods of conductive material, specifically TaSi.sub.2, disposed therein. The rods form Schottky barriers with the semiconductor material. A set of contacts spaced along the length of the body each make ohmic contact to several rods at one end of each rod, and an ohmic contact is made to the semiconductor material of the matrix. Incident radiation is directed at a surface of the body which lies parallel to the rods. Detectors connected to each of the contacts along the length of the body detect current flow generated in the vicinity of the rods associated with each contact member by radiation penetrating into the body to that depth.Type: GrantFiled: March 16, 1987Date of Patent: December 27, 1988Assignee: GTE Laboratories IncorporatedInventors: Mark Levinson, Ben G. Yacobi, Brian M. Ditchek
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Patent number: 4755256Abstract: Method of forming alternating narrow strips of conductive metal silicide, specifically cobalt disilicide, and silicon on a substrate as of silicon with a silicon dioxide or silicon nitride surface layer. Cobalt and silicon are deposited on the substrate in the mole ratio of the eutectic composition of cobalt disilicide and silicon. A molten zone is caused to traverse these materials which upon resolidification at the trailing edge of the molten zone segregate into the two eutectic phases forming alternating narrow strata or lamellae of cobalt disilicide and silicon.Type: GrantFiled: May 17, 1984Date of Patent: July 5, 1988Assignee: GTE Laboratories IncorporatedInventor: Brian M. Ditchek
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Patent number: 4724223Abstract: Electrical contacts are made to conductive elements of an array which are embedded in a matrix of silicon with the conductive elements exposed at a surface. The surface is covered with silicon oxide, and an opening is made in the silicon oxide to expose a portion of the matrix and a portion of each of several conductive elements. A silicide-forming metal, for example cobalt, is deposited, the assemblage is heated to cause the cobalt to react with the exposed silicon to form conductive cobalt disilicide. The cobalt disilicide is in ohmic contact with each of the conductive elements at the interfaces therewith and is in rectifying contact with the silicon of the matrix at the interface therewith. Unreacted cobalt overlying the silicon oxide is removed.Type: GrantFiled: December 11, 1986Date of Patent: February 9, 1988Assignee: GTE Laboratories IncorporatedInventor: Brian M. Ditchek
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Patent number: 4713358Abstract: A low resistivity N-type layer is formed at the surface of a high resistivity N-type epitaxial layer which has been grown on a low resistivity N-type substrate of silicon. Parallel grooves are etched through the low resistivity N-type layer into the high resistivity N-type layer forming interposed ridges of silicon. When fabricating junction gate devices, P-type zones are formed at the end walls of the grooves by ion implantation. A layer of silicon oxide is formed on the side walls of the grooves exposing the silicon at the end walls of the grooves and at the surfaces of the ridges. A layer of a silicide-forming metal, specifically cobalt, is deposited. A rapid thermal annealing treatment is performed which causes the cobalt to react with the silicon and form cobalt silicide at the cobalt-silicon interfaces. The cobalt does not react with the silicon oxide at the side walls of the grooves. The unreacted cobalt is removed by an etching solution which does not attack the cobalt silicide.Type: GrantFiled: May 2, 1986Date of Patent: December 15, 1987Assignee: GTE Laboratories IncorporatedInventors: Emel S. Bulat, Brian M. Ditchek, Scott J. Butler
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Patent number: 4537323Abstract: Boron, oxygen, or a mixture thereof, is used as a sintering aid in sintering Mo-Ti alloys. Compounds formed between these sintering aids and the Mo or Ti have thermal expansion coefficients consistent with that of alloys of Mo and Ti. An hermetic member may be made using these constituents. The hermetic member may be used to seal an assembly such as a high pressure sodium lamp.Type: GrantFiled: January 9, 1984Date of Patent: August 27, 1985Assignee: GTE Laboratories IncorporatedInventors: Brian M. Ditchek, Thomas R. Middleton
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Patent number: 4308079Abstract: It has been found that hydration of aluminum oxide surface coatings to aluminum hydroxide may be curtailed by the presence of corrosion inhibiting amounts of amino phosphonate compounds. Effective inhibitors, such as nitrilotris (methylene) triphosphonic acid, may be applied to aluminum substrates having aluminum oxide surfaces thereupon in concentrations of less than 50% by weight in aqueous solution, and suitably from 1 to about 500 ppm.Type: GrantFiled: June 16, 1980Date of Patent: December 29, 1981Assignee: Martin Marietta CorporationInventors: John D. Venables, Maher E. Tadros, Brian M. Ditchek