Patents by Inventor Brian Mattis

Brian Mattis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12032205
    Abstract: A method of co-manufacturing silicon waveguides, SiN waveguides, and semiconductor structures in a photonic integrated circuit. A silicon waveguide structure can be formed using a suitable process, after which it is buried in a cladding. The cladding is polished, and a silicon nitride layer is disposed to define a silicon nitride waveguide. The silicon nitride waveguide is buried in a cladding, and annealed. Thereafter, cladding above the silicon waveguide structure can be trenched through, and low-temperature operations can be performed to or with an exposed surface of the silicon waveguide structure.
    Type: Grant
    Filed: September 19, 2023
    Date of Patent: July 9, 2024
    Assignee: ORCA Computing Limited
    Inventors: Brian Mattis, Taran Huffman, Bryan Woo, Thien-An Nguyen
  • Publication number: 20240004133
    Abstract: A method of co-manufacturing silicon waveguides, SiN waveguides, and semiconductor structures in a photonic integrated circuit. A silicon waveguide structure can be formed using a suitable process, after which it is buried in a cladding. The cladding is polished, and a silicon nitride layer is disposed to define a silicon nitride waveguide. The silicon nitride waveguide is buried in a cladding, and annealed. Thereafter, cladding above the silicon waveguide structure can be trenched through, and low-temperature operations can be performed to or with an exposed surface of the silicon waveguide structure.
    Type: Application
    Filed: September 19, 2023
    Publication date: January 4, 2024
    Inventors: Brian Mattis, Taran Huffman, Bryan Woo, Thien-An Nguyen
  • Publication number: 20240008271
    Abstract: A semiconductor device includes a floating gate that can be charged in a nonvolatile manner. The floating gate is also structured as an optical waveguide, and may be optically coupled to a photonic circuit, such as an interferometer.
    Type: Application
    Filed: October 31, 2022
    Publication date: January 4, 2024
    Inventors: Brian Mattis, Taran Huffman, Bryan Woo, Thien-An Ngoc Nguyen
  • Patent number: 11838056
    Abstract: A signal generator includes a photonic circuit configured to output a sequence of solitons at a known rate. The solitons illuminate a high-speed photodiode that, in response, generates an electrical signal, such as a sinusoidal signal, which can be provided as input to a direct digital synthesizer configured to output successive phases of a selected waveform in response to electrical stimulus.
    Type: Grant
    Filed: May 5, 2022
    Date of Patent: December 5, 2023
    Assignee: GenXComm, Inc.
    Inventors: Farzad Mokhtari-Koushyar, Thien-An Nguyen, Taran Huffman, Brian Mattis
  • Patent number: 11796737
    Abstract: A method of co-manufacturing silicon waveguides, SiN waveguides, and semiconductor structures in a photonic integrated circuit. A silicon waveguide structure can be formed using a suitable process, after which it is buried in a cladding. The cladding is polished, and a silicon nitride layer is disposed to define a silicon nitride waveguide. The silicon nitride waveguide is buried in a cladding, and annealed. Thereafter, cladding above the silicon waveguide structure can be trenched through, and low-temperature operations can be performed to or with an exposed surface of the silicon waveguide structure.
    Type: Grant
    Filed: February 17, 2021
    Date of Patent: October 24, 2023
    Assignee: GenXComm, Inc.
    Inventors: Brian Mattis, Taran Huffman, Bryan Woo, Thien-An Nguyen
  • Publication number: 20230333009
    Abstract: A photonic circuit and electronic device incorporating the same including a waveguide defining different regions having different widths and cladding thicknesses. The width and cladding thickness in a particular region are configured to loosely confine light in a first set of conditions and to tightly/highly confine light in a second set of conditions. The first and second set of conditions can correspond to the waveguide being positioned proximate to different materials having different indices of refraction.
    Type: Application
    Filed: April 17, 2023
    Publication date: October 19, 2023
    Inventors: Brian Mattis, Taran Huffman
  • Publication number: 20230130434
    Abstract: A signal generator includes a photonic circuit configured to output a sequence of solitons at a known rate. The solitons illuminate a high-speed photodiode that, in response, generates an electrical signal, such as a sinusoidal signal, which can be provided as input to a direct digital synthesizer configured to output successive phases of a selected waveform in response to electrical stimulus.
    Type: Application
    Filed: May 5, 2022
    Publication date: April 27, 2023
    Inventors: Farzad Mokhtari-Koushyar, Thien-An Ngoc Nguyen, Taran Huffman, Brian Mattis
  • Publication number: 20220043211
    Abstract: A method of co-manufacturing silicon waveguides, SiN waveguides, and semiconductor structures in a photonic integrated circuit. A silicon waveguide structure can be formed using a suitable process, after which it is buried in a cladding. The cladding is polished, and a silicon nitride layer is disposed to define a silicon nitride waveguide. The silicon nitride waveguide is buried in a cladding, and annealed. Thereafter, cladding above the silicon waveguide structure can be trenched through, and low-temperature operations can be performed to or with an exposed surface of the silicon waveguide structure.
    Type: Application
    Filed: February 17, 2021
    Publication date: February 10, 2022
    Inventors: Brian Mattis, Taran Huffman, Bryan Woo, Thien-An Nguyen
  • Publication number: 20210336050
    Abstract: A semiconductor device includes a floating gate that can be charged in a nonvolatile manner. The floating gate is also structured as an optical waveguide, and maybe optically coupled to a photonic circuit, such as an interferometer.
    Type: Application
    Filed: April 23, 2021
    Publication date: October 28, 2021
    Inventors: Brian Mattis, Ke Liu, Taran Huffman
  • Patent number: 11150409
    Abstract: A dicing system and methods may include a novel way to separate die on a wafer in preparation for packaging that results in smooth diced edges. This is specifically advantageous, but not limited to, edge-coupled photonic chips. This method etches from the front side of the wafer and dices from the back side of the wafer to create a complete separation of die. It creates an optically smooth surface on the front side of the wafer at the location of the optical device (waveguides or other) which enables direct mounting of adjacent devices with low coupling loss and low optical scattering. The backside dicing may be wider than the front side etch, so as to recess this sawed surface and prevent it from protruding outward, resulting in rough surfaces inhibiting a direct joining of adjacent devices.
    Type: Grant
    Filed: May 8, 2019
    Date of Patent: October 19, 2021
    Assignee: GenXComm, Inc.
    Inventors: Brian Mattis, Taran Huffman, Jason Andrach, Hussein Nili, George Palmer
  • Publication number: 20200209476
    Abstract: A dicing system and methods may include a novel way to separate die on a wafer in preparation for packaging that results in smooth diced edges. This is specifically advantageous, but not limited to, edge-coupled photonic chips. This method etches from the front side of the wafer and dices from the back side of the wafer to create a complete separation of die. It creates an optically smooth surface on the front side of the wafer at the location of the optical device (waveguides or other) which enables direct mounting of adjacent devices with low coupling loss and low optical scattering. The backside dicing may be wider than the front side etch, so as to recess this sawed surface and prevent it from protruding outward, resulting in rough surfaces inhibiting a direct joining of adjacent devices.
    Type: Application
    Filed: May 8, 2019
    Publication date: July 2, 2020
    Inventors: Brian Mattis, Taran Huffman, Jason Andrach, Hussein Nili, George Palmer