Abstract: An embodiment of a semiconductor apparatus for use with a persistent storage media may include technology to detect a power interruption event, and track an amount of off-time for a persistent storage media after the detected power interruption event. Other embodiments are disclosed and claimed.

Abstract: An embodiment of a semiconductor apparatus for use with a persistent storage media may include technology to detect a power interruption event, and track an amount of off-time for a persistent storage media after the detected power interruption event. Other embodiments are disclosed and claimed.

Abstract: A running board attachment. The running board attachment forms a barrier to restrict the passage of objects through the area between a vehicle body and a running board mounted distantly from the vehicle body.

Abstract: A device, combining a component of aerogel insulation with a heating or cooling component, for therapeutic, thermoregulatory, or therapeutic and thermoregulatory use with people or animals. Aerogels perform well as insulators for both high-temperature and low-temperature or cryogenic insulation. The aerogel insulation component and the heating and/or cooling component are enclosed in a structure that supports and retains the components. In some embodiments, a therapeutic garment includes an aerogel insulation layer and a heating and/or cooling system, both positioned between an inner layer and an outer layer. Some embodiments also include a middle layer separating the aerogel insulation layer from the heating and/or cooling system. In some embodiments, an aerogel insulation layer comprises a carrier material permeated with diffused fragments of aerogel material.

Abstract: A running board attachment. The running board attachment forms a barrier to restrict the passage of objects through the area between a vehicle body and a running board mounted distantly from the vehicle body.

Abstract: The present invention relates generally to a system for packaging foodstuffs such as beef, pork, seafood and poultry products wherein the system provides an apparatus and various methods for exposing the food products to one or more gases, or a blend of gases, in a series of steps controlling the pressure of the chamber during one or more flushing operations wherein at least some of the gas or gases associated with at least one flush are allowed to at least partially penetrate the structure of the food product, and thereafter sealing the food product in a container.

Abstract: A bipolar lateral device is disclosed having a high BV.sub.ceo. The device is formed according to a single polysilicon process. In one embodiment silicide is excluded from the surface of the N+ doped polysilicon protecting the N- base width region of the device and the resulting device has a BV.sub.ceo of 8 to 10 V. In another embodiment, the silicide is excluded from the surface of the polysilicon protecting the n-base width region and the polysilicon is maintained as intrinsic polysilicon. The resulting device has a BV.sub.ceo of about 20 V. The devices are useful as voltage clamping devices in programmable logic circuits which must withstand a collector to emitter reverse bias voltage that is sufficient to program either vertical fuse or lateral fuse devices.

Abstract: A vertical fuse structure including a lightly-doped shallow emitter 30 provides improved fusing characteristics. The structure includes a buried collector 14, an overlying base 30, and an emitter 44 above the base 30. In one preferred embodiment, the emitter 44 extends about 0.2 microns from the upper surface and has a dopant concentration of about 8.times.1019 atoms of arsenic per cubic centimeter at the surface. A lightly doped base region 30 extends for about 0.46 microns below the emitter 44 to the collector 14. The upper surface of emitter 44 includes a metal contact 60. Heating the metal 60/emitter 44 interface to its eutectic melting point using a current or voltage pulse causes the aluminum to short through the emitter 44 to the base 30. Shorting the emitter programs the fuse. A second preferred embodiment uses polysilicon as an interconnecting medium.

Abstract: A lateral pnp transistor for use in programmable logic arrays. The lateral pnp has a layer of oxide disposed between a polysilicon layer and the base along the base width. The oxide layer prevents diffusion of the N+ dopant contained in the polysilicon layer into the N- base region. The base region thus remains N- and the resulting transistor has improved breakdown voltage characteristics while retaining the speed advantages of polysilicon contact layers. The lateral pnp transistor is manufactured by a method which requires minimal deviation from other methods used to manufacture lateral pnp transistors.

Abstract: A bipolar lateral device is disclosed having a high BV.sub.ceo. The device is formed according to a single polysilicon process. In one embodiment silicide is excluded from the surface of the N+ doped polysilicon protecting the N- base width region of the device and the resulting device has a BV.sub.ceo of 8 to 10 V. In another embodiment, the silicide is excluded from the surface of the polysilicon protecting the n-base width region and the polysilicon is maintained as intrinsic polysilicon. The resulting device has a BV.sub.ceo of about 20 V. The devices are useful as voltage clamping devices in programmable logic circuits which must withstand a collector to emitter reverse bias voltage that is sufficient to program either vertical fuse or lateral fuse devices.

Abstract: A method for fabricating a diode, for example, for use in a Schottky clamped transistor, which as a process step disposes a layer of oxide between the substrate and the overlying layer of polysilicon which must ultimately be etched away. The oxide layer permits use of an end point dry etch process which in turn allows greater miniaturization of the circuit over wet etch processes. Use of the end point process made feasible by the oxide layer also prevents overetch of the silicon material. As a result, a more ideal metal silicide anode-to-substrate Schottky barrier is formed with corresponding improvements in the diode ideality factor. In addition the oxide layer eliminates Schottky mask alignment problems and further improves diode performance characteristics by elimination of parasitic diodes. The process can be implemented with minimal deviation from other core processes used to fabricate similar circuits.