Abstract: A clamp circuit including a power dissipation circuit having at least one transistor and a resistor which dissipates power from the surge across the resistor and the transistor by turning on the at least one transistor and forming a voltage divider between a source impedance and the resistor thereof disposed in series with a channel of the transistor; and the resistor holding a portion of transient pulse seen by the load to a low voltage and adding of the low voltage to a threshold voltage of the transistor; and a sub-circuit which tests a functionality of the power dissipation circuit.

Abstract: There are provided circuits and methods for surge protection. For example, there is provided a clamp circuit for protecting a load against a surge. The clamp circuit can include a power dissipation circuit including at least one transistor and a resistor. The clamp circuit can further include a voltage sensitive device configured to cause a voltage limit across the load when the surge occurs. The power dissipation circuit can be configured to turn on the at least one transistor to dissipate power across one of the resistor and the at least one transistor.

Abstract: There are provided circuits and methods for surge protection. For example, there is provided a clamp circuit for protecting a load against a surge. The clamp circuit can include a power dissipation circuit including at least one transistor and a resistor. The clamp circuit can further include a voltage sensitive device configured to cause a voltage limit across the load when the surge occurs. The power dissipation circuit can be configured to turn on the at least one transistor to dissipate power across one of the resistor and the at least one transistor.

Abstract: There are provided circuits and methods for surge protection. For example, there is provided a clamp circuit for protecting a load against a surge. The clamp circuit can include a power dissipation circuit including at least one transistor and a resistor. The clamp circuit can further include a voltage sensitive device configured to cause a voltage limit across the load when the surge occurs. The power dissipation circuit can be configured to turn on the at least one transistor to dissipate power across one of the resistor and the at least one transistor.

Abstract: Methods and apparatus are provided for processing digital image data representing first and second images I1 and I2 with overlapping image content to produce digital image data representing a composite image I3 spanning the overlap region O. The method comprises processing image data which corresponds to the overlap region in the first and second images I1 and I2 such that the proportions of first image data and second image data contributing to the overlap region O in the composite image I3 vary along the length L of the overlap region O. Preferred methods include defining a non-straight line J extending along the length of the overlap region O, and performing said processing by reference to said non-straight line J such that the ratio of the proportions of first and second image data contributing to the overlap region O varies for different sections S of the overlap region O along the length L thereof.