Patents by Inventor Brian Michael LAY

Brian Michael LAY has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • MODULAR INTERCONNECT FOR AN INTEGRATED CIRCUIT DEVICE
    Publication number: 20250165692
    Abstract: An integrated circuit device includes a network-on-chip (NoC). Connections for the NoC are generated from a circuit design for the corresponding integrated circuit device. Connections within the NoC are generated by analyzing the circuit design to detect a first connection attribute. The first connection attribute defines a first NoC master unit (NMU) and a first NoC slave unit (NSU). Further, a first NoC configuration is generated. The first NoC configuration includes the connections determined based on the first NMU and the first NSU.
    Type: Application
    Filed: February 27, 2024
    Publication date: May 22, 2025
    Inventors: Brian Michael LAY, William GEORGE, Brian COTTER, Subramanya HEGDE, Rahul KUNWAR, Jaipal Reddy NAREDDY, Gautham SUNDARARAJAN, Stephen L. BADE