Abstract: A flat bed scanner system for optically sensing a transparent original image and producing three channels of binary digital data representing the densities of the original image. Each channel produces data in response to one sensing color and sensing of the original image occurs by directing a focused image of a beam of white light onto and across the original image in a pattern of parallel scan lines there being a plurality of sensing positions along each scan line, and producing the digital output data in response to the modulated beam of light transmitted by the original image. There is an optical system which provides for the directing of the beam of white light across the original image and which directs the modulated beam onto sensors. The optical system includes color correction and field flattening of the beam of white light and provides a cylinder condenser lens for the modulated beam of white light.

Abstract: A central processor for an electronic organ in the form of a single, forty pin integrated circuit chip employing multiplexed technology and trinary and tri-level inputs to obtain maximum usage from each pin. The solo manual keys, chord keys, rhythm pattern switches and other control functions are multiplexed externally of the chip, fed into the chip as a time division multiplexed four bit byte over four pins, and demultiplexed internally of the chip. The solo manual information is multiplexed internally of the chip to form a single serial data stream, is combined with solo fill note data generated within the chip and then brought out over a single pin for external demultiplexing. The twelve tones of a musical octave are brought into the chip over twelve pins together with various static control signals, are decoded by tri-level decoders internally of the chip, and then utilized to generate the tones of the chords, also internally of the chip.

Abstract: A central processor for an electronic organ in the form of a single, forty pin integrated circuit chip employing multiplexed technology and trinary and tri-level inputs to obtain maximum usage from each pin. The solo manual keys, chord keys, rhythm pattern switches and other control functions are multiplexed externally of the chip, fed into the chip as a time division multiplexed four bit byte over four pins, and demultiplexed internally of the chip. The solo manual information is multiplexed internally of the chip to form a single serial data stream, is combined with solo fill note data generated within the chip and then brought out over a single pin for external demultiplexing. The twelve tones of a musical octave are brought into the chip over twelve pins together with various static control signals, are decoded by tri-level decoders internally of the chip, and then utilized to generate the tones of the chords, also internally of the chip.

Abstract: An integrated keyer system for use in electronic organs comprising a plurality of discrete integrated circuit chips each corresponding to two adjacent octaves of the keyboard and connected in series to accommodate the entire keyboard. The keyer system is adapted for use in multiplexed systems wherein the keyswitch closure information is encoded in a time division multiplexed data stream fed through a plurality of the keyer chips, which are connected in series. Each of the keyer chips includes a plurality of tone inputs and outputs and a divide-by-four circuit for lowering the tones in by two octaves. The keyer chips also include serial data inputs and outputs and a demultiplexer for demultiplexing the serial data stream at the serial data input to produce a plurality of control signals corresponding to keydown signals in the serial data stream, which are fed to the individual keyers.

Abstract: An integrated keyer system for use in electronic organs comprising a plurality of discrete integrated circuit chips each corresponding to two adjacent octaves of the keyboard and connected in series to accommodate the entire keyboard. The keyer system is adapted for use in multiplexed systems wherein the keyswitch closure information is encoded in a time division multiplexed data stream fed through a plurality of the keyer chips, which are connected in series. Each of the keyer chips includes a plurality of tone inputs and outputs and a divide-by-four circuit for lowering the tones in by two octaves. The keyer chips also include serial data inputs and outputs and a demultiplexer for demultiplexing the serial data stream at the serial data input to produce a plurality of control signals corresponding to keydown signals in the serial data stream, which are fed to the individual keyers.

Abstract: Circuitry for generating rhythmic patterns of notes corresponding to notes of a selected chord wherein tone signals according to the notes of the selected chord are connected to the inputs of keyers each time a chord playing key is depressed and control a current which flows through the keyers to the organ output circuitry in accordance with a selected pattern sequence of notes which is provided to a plurality of envelope generators at a rhythmic rate. The keyers are grouped to correspond to the four components of a selected chord and each of the keyer groups has an individual envelope generator connected thereto which activates the keyer group under the command of the selected pattern and imparts a characteristic attack and decay envelope to the tone signal.

Abstract: A method and apparatus for memorizing and playing back an accompaniment passage in an electronic organ wherein the keyboard is multiplexed to develop a serial input data stream having keydown signals in the time slots corresponding to the depressed keys, selectively writing into a programmable random access memory data corresponding to the absolute address of the first occurring keydown signal in the pulse train and then writing into the memory data corresponding to the intervals, expressed in terms of time slots in the multiplexed data stream, between a number of the first occurring keydown signals, beginning with the first occurring signal. The data is read out of the memory and converted to a serial time division multiplexed data stream by means of comparators which produce a pulse each time there is a compare condition between the output of the memory and the count produced by the master counter/subcounter.