Patents by Inventor Brian Nickerson

Brian Nickerson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240102605
    Abstract: A multi-legged equipment support, components thereof, and associated methods. The equipment support comprises a stand and an equipment holder. The stand includes a hub and multiple legs pivotable with respect to the hub. The legs are pivotable outward from stowed positions to preset operational pivoted positions. The user can select a preset operational pivoted position in which outward pivoting of a leg will stop based on moving an actuator between preset locations.
    Type: Application
    Filed: December 11, 2023
    Publication date: March 28, 2024
    Applicant: AOB Products Company
    Inventors: Brian Steere, Michael Cottrell, Timothy S. Kinney, James Tayon, Jason Nickerson, Justin Burke, Anthony Vesich, Dennis W. Cauley, JR., Mark Dalton, Kyle Smith
  • Publication number: 20160034937
    Abstract: Systems and methods for enhanced price adjustment location systems in accordance with embodiments of the invention are illustrated. In one embodiments, a price adjustment location server system includes a processor and a memory connected to the processor and storing a price adjustment location application, wherein the price adjustment location application directs the processor to identify partner data, generate a partner link code, generate price adjustment link data based on the generated partner link code, provide the price adjustment link data, obtain engagement data describing engagement with the price adjustment link data, calculate reward data describing the rewards generated by the engagement described in the engagement data, and distribute the calculated rewards based on the identified partner data.
    Type: Application
    Filed: July 29, 2015
    Publication date: February 4, 2016
    Inventors: Brian Nickerson, Christian Levy, Samira Mahjoub
  • Publication number: 20140207620
    Abstract: Systems and methods for price adjustment location systems in accordance with embodiments of the invention are illustrated. In one embodiment, a product location system includes a processor and memory, wherein the memory is configured to store a price adjustment location application and wherein the price adjustment location application configures the processor to obtain a search query, where the search query includes product budget data identifying at least one product price threshold, determine at least one product category based on the obtained search query, where a product category describes a grouping of products, identify at least one price adjustment based on the determined at least one product category and the product budget data, where the at least one relevant price adjustment falls within a specified budget based on the at least one product price threshold, and generate a listing of relevant price adjustments based on the identified price adjustments.
    Type: Application
    Filed: January 20, 2014
    Publication date: July 24, 2014
    Applicant: Dockweiler Media, Inc.
    Inventors: Brian Nickerson, Christian Levy, Samira Mahjoub
  • Publication number: 20060092320
    Abstract: A portion of a video frame is transferred via a memory burst transfer, from memory to an on-chip buffer. The on-chip buffer has a width that is the same as the memory burst width for the memory. Video processing is performed upon the transferred portion. Other embodiments are also described and claimed.
    Type: Application
    Filed: October 29, 2004
    Publication date: May 4, 2006
    Inventors: Brian Nickerson, Samuel Wong, Sunil Chaudhari, Jonathan Liu, Sreenath Kurupati
  • Publication number: 20060062489
    Abstract: A method and apparatus for hardware-based anamorphic video scaling. In one embodiment, the method includes the fetch of zero or more new input pixels according to an entry of an input control memory corresponding to a current output pixel. Once fetched, the zero or more new input pixels replace at least one stored input pixel of N, input pixels. Using the updated N, input pixels and an N, coefficient set selected according to an entry of a coefficient memory corresponding to the current output pixel, a pixel computation, such as, for example, an anamorphic scaling computation, is performed. In one embodiment, the anamorphic scaling is performed by subdividing an X×Y pixel frame into X/M M×Y pixel subframes. Other embodiments are described and claimed.
    Type: Application
    Filed: September 22, 2004
    Publication date: March 23, 2006
    Inventors: Samuel Wong, Sreenath Kurupati, Brian Nickerson, Sunil Chaudhari, Jonathan Liu
  • Publication number: 20060061582
    Abstract: A method and apparatus for hardware-base edge handling in video post-processing. In one embodiment, the method includes the identification of at least one unstored input pixel required to compute an output pixel during output pixel computation. Once identified, a pixel value is generated for the at least one unstored input pixel according to a detected edge handling mode. The generation of the pixel value for the unstored input pixel is performed, in one embodiment, if a position of the unstored input pixel is outside a pixel frame boundary. For example, in one embodiment, for output pixel computation of a scaling operation, the frame boundaries include a left (top) edge and a right (bottom) edge for which input pixels required to compute output pixels at or near the frame boundaries do not exist. Other embodiments are described and claimed.
    Type: Application
    Filed: September 22, 2004
    Publication date: March 23, 2006
    Inventors: Sreenath Kurupati, Brian Nickerson, Samuel Wong, Sunil Chaudhari, Jonathan Liu
  • Patent number: 5559722
    Abstract: A plurality of signals in a first domain are loaded into a plurality of registers, wherein each register contains two or more signals. A transform is applied to the plurality of registers to transform the contents of the registers to a second domain. A plurality of transformed signals corresponding to the plurality of signals in the first domain are retrieved from the plurality of registers.
    Type: Grant
    Filed: April 28, 1994
    Date of Patent: September 24, 1996
    Assignee: Intel Corporation
    Inventor: Brian Nickerson
  • Patent number: 5539662
    Abstract: The complexity of a plurality of signals in a first domain are characterized. A transform is selected in accordance with the complexity of the plurality of signals, wherein the selected transform is one of a plurality of transforms having differing complexities. The selected transform is applied to the plurality of signals to generate a plurality of transformed signals in a second domain.
    Type: Grant
    Filed: April 28, 1994
    Date of Patent: July 23, 1996
    Assignee: Intel Corporation
    Inventor: Brian Nickerson
  • Patent number: 5528238
    Abstract: A fixed-length signal is retrieved from a bitstream comprising one or more variable-length encoded signals. A variable-length encoded signal of the bitstream is decoded to generate a decoded signal corresponding to the fixed-length signal by accessing one or more tables in accordance with the fixed-length signal to retrieve a contribution, an input pointer flag, an output pointer flag, and a next state.
    Type: Grant
    Filed: April 28, 1994
    Date of Patent: June 18, 1996
    Assignee: Intel Corporation
    Inventor: Brian Nickerson
  • Patent number: 5493514
    Abstract: For encoding, each video frame is segmented into slices; each slice, into macroblocks; and each macroblock, into blocks. Encoded macroblock and block signals are generated corresponding to macroblock and block information of each slice, respectively. An encoded bitstream is generated in accordance with the encoded macroblock and block signals, wherein all of the macroblock signals for each slice precede all of the block signals for each slice. For decoding, an encoded bitstream is received, wherein (1) a portion of the encoded bitstream corresponding to each video frame corresponds to slices; and (2) a portion of the encoded bitstream corresponding to each slice comprises encoded macroblock signals followed by block signals for the entire slice. The macroblock and block signals of each slice are decoded and decoded video signals are generated in accordance with the decoded macroblock and block signals.
    Type: Grant
    Filed: April 28, 1994
    Date of Patent: February 20, 1996
    Assignee: Intel Corporation
    Inventors: Michael Keith, Brian Nickerson
  • Patent number: 5488568
    Abstract: A method and system for processing an image. The system stores and decodes encoded image data. Before decoding, the image data has an OPERATING SYSTEM header, a BITSTREAM header, a Y-COMPONENT DATA field, a U-COMPONENT DATA field, and a V-COMPONENT DATA field. Each of the DATA fields has a four-byte MC VECTOR COUNT field, an MC VECTORS field, and an ENCODED DATA field that has interleaved binary tree codes and region codes. The system also converts the decoded OPERATING SYSTEM header, decoded BITSTREAM header, decoded Y-COMPONENT DATA field, decoded U-COMPONENT DATA field, and decoded V-COMPONENT DATA field for display. In addition, the system displays the converted image data.
    Type: Grant
    Filed: June 16, 1993
    Date of Patent: January 30, 1996
    Assignee: Intel Corporation
    Inventors: Michael Keith, Rohan Coelho, Stuart Golin, Brian Nickerson
  • Patent number: 5432554
    Abstract: A method and apparatus for decoding image data. Before decoding, the image data has an OPERATING SYSTEM header, a BITSTREAM header, a Y-COMPONENT DATA field, a U-COMPONENT DATA field, and a V-COMPONENT DATA field. Each of the DATA fields has a four-byte MC VECTOR COUNT field, an MC VECTORS field, and an ENCODED DATA field that has interleaved binary tree codes and region codes.
    Type: Grant
    Filed: June 16, 1993
    Date of Patent: July 11, 1995
    Assignee: Intel Corporation
    Inventors: Brian Nickerson, Michael Keith, Rohan Coelho, Stuart Golin
  • Patent number: 5386232
    Abstract: A method and apparatus for encoding image data. After encoding, the image data has an OPERATING SYSTEM header, a BITSTREAM header, a Y-COMPONENT DATA field, a U-COMPONENT DATA field, and a V-COMPONENT DATA field. Each of the DATA fields has a four-byte MC VECTOR COUNT field, an MC VECTORS field, and an ENCODED DATA field that has interleaved binary tree codes and region codes.
    Type: Grant
    Filed: June 16, 1993
    Date of Patent: January 31, 1995
    Assignee: Intel Corporation
    Inventors: Stuart Golin, Brian Nickerson, Michael Keith, Rohan Coelho
  • Patent number: 5384582
    Abstract: A method, apparatus, and system for generating an image from subsampled, three-component image data. First and second components of the image data are processed to generate a dither index to a dither lookup table. The third component of the image data is dithered. CLUT index data is then generated using the dither data from the dither lookup table and the dithered third-component data. The CLUT index data may then be used to generate the image. In a preferred embodiment, a 14-bit dither index to a 16K dither lookup table is generated from the U and V components of a (4.times.4) block of YUV9 data. The Y components are dithered and then processed with the appropriate dither lookup table data to generate 16 CLUT index values for the (4.times.4) block. The dithering and processing is preferably performed on a row-by-row basis in a pseudo-SIMD fashion.
    Type: Grant
    Filed: June 16, 1993
    Date of Patent: January 24, 1995
    Assignee: Intel Corporation
    Inventors: Michael Keith, Brian Nickerson
  • Patent number: 5351085
    Abstract: A method and system for generating compressed image signal. The system generates an analog image signal corresponding to the image, generates unencoded three-component image data from the analog image signal, and encodes the unencoded image data. After encoding, the image data has an OPERATING SYSTEM header, a BITSTREAM header, a Y-COMPONENT DATA field, a U-COMPONENT DATA field, and a V-COMPONENT DATA field. Each of the DATA fields has a four-byte MC VECTOR COUNT field, an MC VECTORS field, and an ENCODED DATA field that has interleaved binary tree codes and region codes. The system also stores the OPERATING SYSTEM header, BITSTREAM header, Y-COMPONENT DATA field, U-COMPONENT DATA field, and V-COMPONENT DATA field. In a preferred embodiment, the invention generates compressed video signals.
    Type: Grant
    Filed: June 16, 1993
    Date of Patent: September 27, 1994
    Assignee: Intel Corporation
    Inventors: Rohan Coelho, Stuart Golin, Brian Nickerson, Michael Keith