Patents by Inventor Brian O'Krafka

Brian O'Krafka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11030156
    Abstract: Apparatuses, systems, methods, and computer program products are disclosed for key-value stores with partial data access. An interface module is configured to receive a data object for storage in a key-value store. The data object may include a key and a value. A block object module is configured to generate a plurality of block objects smaller than the data object. A block object may include a new key and a new value. The new key may be based on the key for the data object and on metadata for the new value. The new value may be based on at least a portion of the value for the data object. A storage module is configured to store the block objects in the key-value store.
    Type: Grant
    Filed: August 9, 2016
    Date of Patent: June 8, 2021
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Tomy Cheru, Brian O'Krafka, Allen Samuels, Manavalan Krishnan
  • Patent number: 10643707
    Abstract: An apparatus includes a non-volatile memory and a controller coupled to the non-volatile memory. The controller is configured to receive a command from a device to perform a write operation at the non-volatile memory. The command indicates a plurality of logical addresses, data associated with the plurality of logical addresses, and a number of write operations associated with the command.
    Type: Grant
    Filed: July 25, 2017
    Date of Patent: May 5, 2020
    Assignee: Western Digital Technologies, Inc.
    Inventors: Thibash Rajamani, Ramesh Chander, Manavalan Krishnan, Brian O'Krafka, Nagi Reddy Chodem
  • Publication number: 20190035473
    Abstract: An apparatus includes a non-volatile memory and a controller coupled to the non-volatile memory. The controller is configured to receive a command from a device to perform a write operation at the non-volatile memory. The command indicates a plurality of logical addresses, data associated with the plurality of logical addresses, and a number of write operations associated with the command.
    Type: Application
    Filed: July 25, 2017
    Publication date: January 31, 2019
    Inventors: Thibash Rajamani, Ramesh Chander, Manavalan Krishnan, Brian O'Krafka, Nagi Reddy Chodem
  • Publication number: 20170185625
    Abstract: Apparatuses, systems, methods, and computer program products are disclosed for key-value stores with partial data access. An interface module is configured to receive a data object for storage in a key-value store. The data object may include a key and a value. A block object module is configured to generate a plurality of block objects smaller than the data object. A block object may include a new key and a new value. The new key may be based on the key for the data object and on metadata for the new value. The new value may be based on at least a portion of the value for the data object. A storage module is configured to store the block objects in the key-value store.
    Type: Application
    Filed: August 9, 2016
    Publication date: June 29, 2017
    Applicant: SanDisk Technologies LLC
    Inventors: Tomy Cheru, Brian O'Krafka, Allen Samuels, Manavalan Krishnan
  • Patent number: 9501398
    Abstract: A persistent storage device includes both persistent storage, which includes a set of persistent storage blocks, and NVRAM, and in particular a set of NVRAM blocks. The persistent storage device also typically includes a storage controller. The persistent storage device, in addition to responding to commands to write data directly to and to read data directly from persistent storage blocks is also configured to write data to specified NVRAM blocks (e.g., specified by a host NVRAM write command) and to transfer data from a specified NVRAM block to a specified persistent storage block. As a result, multiple writes to a particular persistent storage block can be replaced with multiple writes to an NVRAM block and a subsequent single write to the particular persistent storage block. This reduces the number of writes to persistent storage and also reduces the number of corresponding block erase operations.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: November 22, 2016
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Johann George, Aaron Olbrich, Brian O'Krafka, Darpan Dinker, Patrick Chiu, Evgeny Firsov
  • Publication number: 20150268989
    Abstract: The embodiments described herein include methods and systems for improving the performance of application virtual machines by extending an object store corresponding to the application virtual machine. The method includes identifying a subset of migratable objects from a plurality of objects associated with the application virtual machine, where the subset of migratable objects includes one or more objects and the plurality of objects are stored in the object store comprising a portion of the memory allocated for the application virtual machine. The method also includes selecting a respective object from the subset of migratable objects to be migrated from the object store to a persistent datastore, where the persistent datastore is distinct from the object store. The method further includes causing the respective object to be migrated from the object store to the persistent datastore.
    Type: Application
    Filed: July 23, 2014
    Publication date: September 24, 2015
    Inventors: John Busch, Brian O'Krafka, Patrick Chiu, Yachun Miao
  • Publication number: 20140181373
    Abstract: A persistent storage device includes both persistent storage, which includes a set of persistent storage blocks, and NVRAM, and in particular a set of NVRAM blocks. The persistent storage device also typically includes a storage controller. The persistent storage device, in addition to responding to commands to write data directly to and to read data directly from persistent storage blocks is also configured to write data to specified NVRAM blocks (e.g., specified by a host NVRAM write command) and to transfer data from a specified NVRAM block to a specified persistent storage block. As a result, multiple writes to a particular persistent storage block can be replaced with multiple writes to an NVRAM block and a subsequent single write to the particular persistent storage block. This reduces the number of writes to persistent storage and also reduces the number of corresponding block erase operations.
    Type: Application
    Filed: March 14, 2013
    Publication date: June 26, 2014
    Inventors: Johann George, Aaron Olbrich, Brian O'Krafka, Darpan Dinker, Patrick Chiu, Evgeny Firsov
  • Patent number: 8385740
    Abstract: A method of arbitrating data transmissions to prevent data collisions in an optical data interconnect system including a transmitting node, a plurality of receiving nodes, and one or more remaining nodes connected through an optical data channel. The method involves transmitting a transmission request signal from the transmitting node over an arbitration channel corresponding to the transmitting node, monitoring, at the transmitting node, a plurality of arbitration channels corresponding to each of the plurality of receiving nodes and the one or more remaining nodes at the transmitting node for a predetermined period of time, determining a start time for a data transmission from the transmitting node based on the monitored signals to prevent a data collision, and initiating a data transmission of a data signal from the transmitting node over the optical data channel at the determined start time.
    Type: Grant
    Filed: July 18, 2008
    Date of Patent: February 26, 2013
    Assignee: Oracle America, Inc.
    Inventors: Brian O'Krafka, Pranay Koka, John E. Cunningham, Ashok Krishnamoorthy, Xuezhe Zheng
  • Publication number: 20050120182
    Abstract: One embodiment of the present invention provides a system that facilitates cache coherence with adaptive write updates. During operation, a cache is initialized to operate using a write-invalidate protocol. During program execution, the system monitors the dynamic behavior of the cache. If the dynamic behavior indicates that better performance can be achieved using a write-broadcast protocol, the system switches the cache to operate using the write-broadcast protocol.
    Type: Application
    Filed: December 2, 2003
    Publication date: June 2, 2005
    Inventors: Michael Koster, Brian O'Krafka, Roy Moore
  • Patent number: 5692153
    Abstract: A method and system are disclosed for verifying consistency of an instruction execution order of a multiprocessor data processing system with a specified memory consistency model. Each processor within the multiprocessor data processing system executes instructions from an associated one of a number of instruction streams, which include instructions that store a number of unique values from multiple processors to a single selected address within memory. One of the unique values is loaded from the selected address to a particular processor within the data processing system. A set of valid values which may be returned by the loading step is determined according to the specified memory consistency model. By comparing the unique value with members of the set of valid values, the instruction execution order of the multiprocessor data processing system is verified. Utilizing the unique value which was returned by the load instruction, the set of valid values may then be updated.
    Type: Grant
    Filed: March 16, 1995
    Date of Patent: November 25, 1997
    Assignee: International Business Machines Corporation
    Inventors: Nadeem Malik, Brian O'Krafka, Avijit Saha, Shahram Salamian