Patents by Inventor Brian Okchon Chae

Brian Okchon Chae has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11915442
    Abstract: An apparatus and method for geometrically correcting an arbitrary shaped input frame and generating an undistorted output frame. The method includes capturing arbitrary shaped input images with multiple optical devices and processing the images, identifying redundant blocks and valid blocks in each of the images, allocating an output frame with an output frame size and dividing the output frame into regions shaped as a rectangle, programming the apparatus and disabling processing for invalid blocks in each of the regions, fetching data corresponding to each of the valid blocks and storing in an internal memory, interpolating data for each of the regions with stitching and composing the valid blocks for the output frame and displaying the output frame on a display module.
    Type: Grant
    Filed: September 14, 2021
    Date of Patent: February 27, 2024
    Assignee: Texas Instruments Incorporated
    Inventors: Rajasekhar Reddy Allu, Niraj Nandan, Mihir Narendra Mody, Gang Hua, Brian Okchon Chae, Shashank Dabral, Hetul Sanghvi, Vikram VijayanBabu Appia, Sujith Shivalingappa
  • Publication number: 20240005449
    Abstract: An image data frame is received from an external source. An error concealment operation is performed on the received image data frame in response to determining that a first frame size of the received image data frame is erroneous. The first frame size of the image data frame is determined to be erroneous based on at least one frame synchronization signal associated with the image data frame. An image processing operation is performed on the received image data frame on which the error concealment operation has been performed, thereby enabling an image processing module to perform the image processing operation without entering into a deadlock state and thereby prevent a host processor from having to execute hardware resets of deadlocked modules.
    Type: Application
    Filed: September 15, 2023
    Publication date: January 4, 2024
    Inventors: Brian Okchon CHAE, Niraj NANDAN, Anthony Joseph LELL, Mihir MODY
  • Patent number: 11798128
    Abstract: An image data frame is received from an external source. An error concealment operation is performed on the received image data frame in response to determining that a first frame size of the received image data frame is erroneous. The first frame size of the image data frame is determined to be erroneous based on at least one frame synchronization signal associated with the image data frame. An image processing operation is performed on the received image data frame on which the error concealment operation has been performed, thereby enabling an image processing module to perform the image processing operation without entering into a deadlock state and thereby prevent a host processor from having to execute hardware resets of deadlocked modules.
    Type: Grant
    Filed: January 17, 2020
    Date of Patent: October 24, 2023
    Assignee: Texas Instruments Incorporated
    Inventors: Brian Okchon Chae, Niraj Nandan, Anthony Joseph Lell, Mihir Mody
  • Patent number: 11599975
    Abstract: An apparatus and method for geometrically correcting a distorted input frame and generating an undistorted output frame. The apparatus includes an external memory block that stores the input frame, a counter block to compute output coordinates of the output frame for a region based on a block size of the region, a back mapping block to generate input coordinates corresponding to each of the output coordinates, a bounding module to compute input blocks corresponding to each of the input coordinates, a buffer module to fetch data corresponding to each of the input blocks, an interpolation module to interpolate data from the buffer module and a display module that receives the interpolated data for each of the regions and stitch an output image. The method includes determining the size of the output block based on a magnification data.
    Type: Grant
    Filed: July 16, 2020
    Date of Patent: March 7, 2023
    Assignee: Texas Instruments Incorporated
    Inventors: Rajasekhar Reddy Allu, Niraj Nandan, Mihir Narendra Mody, Gang Hua, Brian Okchon Chae, Shashank Dabral, Hetul Sanghvi, Vikram VijayanBabu Appia, Sujith Shivalingappa
  • Publication number: 20210407120
    Abstract: An apparatus and method for geometrically correcting an arbitrary shaped input frame and generating an undistorted output frame. The method includes capturing arbitrary shaped input images with multiple optical devices and processing the images, identifying redundant blocks and valid blocks in each of the images, allocating an output frame with an output frame size and dividing the output frame into regions shaped as a rectangle, programming the apparatus and disabling processing for invalid blocks in each of the regions, fetching data corresponding to each of the valid blocks and storing in an internal memory, interpolating data for each of the regions with stitching and composing the valid blocks for the output frame and displaying the output frame on a display module.
    Type: Application
    Filed: September 14, 2021
    Publication date: December 30, 2021
    Inventors: Rajasekhar Reddy Allu, Niraj Nandan, Mihir Narendra Mody, Gang Hua, Brian Okchon Chae, Shashank Dabral, Hetul Sanghvi, Vikram VijayanBabu Appia, Sujith Shivalingappa
  • Patent number: 11145079
    Abstract: An apparatus and method for geometrically correcting an arbitrary shaped input frame and generating an undistorted output frame. The method includes capturing arbitrary shaped input images with multiple optical devices and processing the images, identifying redundant blocks and valid blocks in each of the images, allocating an output frame with an output frame size and dividing the output frame into regions shaped as a rectangle, programming the apparatus and disabling processing for invalid blocks in each of the regions, fetching data corresponding to each of the valid blocks and storing in an internal memory, interpolating data for each of the regions with stitching and composing the valid blocks for the output frame and displaying the output frame on a display module.
    Type: Grant
    Filed: January 24, 2018
    Date of Patent: October 12, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Rajasekhar Reddy Allu, Niraj Nandan, Mihir Narendra Mody, Gang Hua, Brian Okchon Chae, Shashank Dabral, Hetul Sanghvi, Vikram VijayanBabu Appia, Sujith Shivalingappa
  • Publication number: 20210209390
    Abstract: An image data frame is received from an external source. An error concealment operation is performed on the received image data frame in response to determining that a first frame size of the received image data frame is erroneous. The first frame size of the image data frame is determined to be erroneous based on at least one frame synchronization signal associated with the image data frame. An image processing operation is performed on the received image data frame on which the error concealment operation has been performed, thereby enabling an image processing module to perform the image processing operation without entering into a deadlock state and thereby prevent a host processor from having to execute hardware resets of deadlocked modules.
    Type: Application
    Filed: January 17, 2020
    Publication date: July 8, 2021
    Inventors: Brian Okchon CHAE, Niraj NANDAN, Anthony Joseph LELL, Mihir MODY
  • Publication number: 20210042891
    Abstract: A method for geometrically correcting a distorted input frame and generating an undistorted output frame includes capturing and storing an input frame in an external memory, allocating an output frame with an output frame size and dividing the output frame into output blocks, computing a size of the input blocks in the input image corresponding to each output blocks, checking if the size of the input blocks is less than the size of the internal memory and if not dividing until the required input block size of divided sub blocks is less than the size of the internal memory, programming an apparatus with input parameters, fetching the input blocks into an internal memory, processing each of the divided sub blocks sequentially and processing the next output block in step until all the output blocks are processed; and composing the output frame for each of the blocks in the output frame.
    Type: Application
    Filed: October 27, 2020
    Publication date: February 11, 2021
    Inventors: Rajasekhar Reddy Allu, Niraj Nandan, Mihir Narendra Mody, Gang Hua, Brian Okchon Chae, Shashank Dabral, Hetul Sanghvi, Vikram VijayanBabu Appia, Sujith Shivalingappa
  • Patent number: 10853923
    Abstract: A method for geometrically correcting a distorted input frame and generating an undistorted output frame includes capturing and storing an input frame in an external memory, allocating an output frame with an output frame size and dividing the output frame into output blocks, computing a size of the input blocks in the input image corresponding to each output blocks, checking if the size of the input blocks is less than the size of the internal memory and if not dividing until the required input block size of divided sub blocks is less than the size of the internal memory, programming an apparatus with input parameters, fetching the input blocks into an internal memory, processing each of the divided sub blocks sequentially and processing the next output block in step until all the output blocks are processed; and composing the output frame for each of the blocks in the output frame.
    Type: Grant
    Filed: March 21, 2018
    Date of Patent: December 1, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Rajasekhar Reddy Allu, Niraj Nandan, Mihir Narendra Mody, Gang Hua, Brian Okchon Chae, Shashank Dabral, Hetul Sanghvi, Vikram VijayanBabu Appia, Sujith Shivalingappa
  • Publication number: 20200349683
    Abstract: An apparatus and method for geometrically correcting a distorted input frame and generating an undistorted output frame. The apparatus includes an external memory block that stores the input frame, a counter block to compute output coordinates of the output frame for a region based on a block size of the region, a back mapping block to generate input coordinates corresponding to each of the output coordinates, a bounding module to compute input blocks corresponding to each of the input coordinates, a buffer module to fetch data corresponding to each of the input blocks, an interpolation module to interpolate data from the buffer module and a display module that receives the interpolated data for each of the regions and stitch an output image. The method includes determining the size of the output block based on a magnification data.
    Type: Application
    Filed: July 16, 2020
    Publication date: November 5, 2020
    Inventors: Rajasekhar Reddy Allu, Niraj Nandan, Mihir Narendra Mody, Gang Hua, Brian Okchon Chae, Shashank Dabral, Hetul Sanghvi, Vikram VijayanBabu Appia, Sujith Shivalingappa
  • Patent number: 10540736
    Abstract: An integrated circuit includes a display sub-system that has a plurality of image processing resources and control logic. The image processing resources include a plurality of image processing pipelines configured to operate in parallel, overlay logic coupled to receive image data from the plurality of image processing pipelines, and an image output port coupled to an output of the overlay logic with image data outputs configured to couple to one or more display devices. The control logic is dynamically configurable to assign each of the image processing resources to a selected one of a first control port and a second control port. The first control port is configured to be controlled exclusively by a first processor and the second control port is configured to be controlled exclusively by a second processor.
    Type: Grant
    Filed: August 3, 2017
    Date of Patent: January 21, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Sunita Nadampalli, Anish Reghunath, Brian Okchon Chae, Jonathan Elliot Bergsagel, Gregory Raymond Shurtz
  • Publication number: 20190096042
    Abstract: A method for geometrically correcting a distorted input frame and generating an undistorted output frame includes capturing and storing an input frame in an external memory, allocating an output frame with an output frame size and dividing the output frame into output blocks, computing a size of the input blocks in the input image corresponding to each output blocks, checking if the size of the input blocks is less than the size of the internal memory and if not dividing until the required input block size of divided sub blocks is less than the size of the internal memory, programming an apparatus with input parameters, fetching the input blocks into an internal memory, processing each of the divided sub blocks sequentially and processing the next output block in step until all the output blocks are processed; and composing the output frame for each of the blocks in the output frame.
    Type: Application
    Filed: March 21, 2018
    Publication date: March 28, 2019
    Inventors: Rajasekhar Reddy Allu, Niraj Nandan, Mihir Narendra Mody, Gang Hua, Brian Okchon Chae, Shashank Dabral, Hetul Sanghvi, Vikram VijayanBabu Appia, Sujith Shivalingappa
  • Publication number: 20190096041
    Abstract: An apparatus and method for geometrically correcting a distorted input frame and generating an undistorted output frame. The apparatus includes an external memory block that stores the input frame, a counter block to compute output coordinates of the output frame for a region based on a block size of the region, a back mapping block to generate input coordinates corresponding to each of the output coordinates, a bounding module to compute input blocks corresponding to each of the input coordinates, a buffer module to fetch data corresponding to each of the input blocks, an interpolation module to interpolate data from the buffer module and a display module that receives the interpolated data for each of the regions and stitch an output image. The method includes determining the size of the output block based on a magnification data.
    Type: Application
    Filed: September 25, 2017
    Publication date: March 28, 2019
    Inventors: Rajasekhar Reddy Allu, Niraj Nandan, Mihir Narendra Mody, Gang Hua, Brian Okchon Chae, Shashank Dabral, Hetul Sanghvi, Vikram VijayanBabu Appia, Sujith Shivalingappa
  • Publication number: 20190096077
    Abstract: An apparatus and method for geometrically correcting an arbitrary shaped input frame and generating an undistorted output frame. The method includes capturing arbitrary shaped input images with multiple optical devices and processing the images, identifying redundant blocks and valid blocks in each of the images, allocating an output frame with an output frame size and dividing the output frame into regions shaped as a rectangle, programming the apparatus and disabling processing for invalid blocks in each of the regions, fetching data corresponding to each of the valid blocks and storing in an internal memory, interpolating data for each of the regions with stitching and composing the valid blocks for the output frame and displaying the output frame on a display module.
    Type: Application
    Filed: January 24, 2018
    Publication date: March 28, 2019
    Inventors: Rajasekhar Reddy Allu, Niraj Nandan, Mihir Narendra Mody, Gang Hua, Brian Okchon Chae, Shashank Dabral, Hetul Sanghvi, Vikram VijayanBabu Appia, Sujith Shivalingappa
  • Publication number: 20190043153
    Abstract: An integrated circuit includes a display sub-system that has a plurality of image processing resources and control logic. The image processing resources include a plurality of image processing pipelines configured to operate in parallel, overlay logic coupled to receive image data from the plurality of image processing pipelines, and an image output port coupled to an output of the overlay logic with image data outputs configured to couple to one or more display devices. The control logic is dynamically configurable to assign each of the image processing resources to a selected one of a first control port and a second control port. The first control port is configured to be controlled exclusively by a first processor and the second control port is configured to be controlled exclusively by a second processor.
    Type: Application
    Filed: August 3, 2017
    Publication date: February 7, 2019
    Inventors: Sunita Nadampalli, Anish Reghunath, Brian Okchon Chae, Jonathan Elliot Bergsagel, Gregory Raymond Shurtz
  • Patent number: 8625032
    Abstract: A method for capturing video frames from a plurality of video channels is provided. A list of a least two descriptors is formed for each of the plurality of video channels in a memory accessible to a direct memory access (DMA) engine, wherein each of the two or more descriptors for each channel is programmed to define a storage location for a sequential frame of video data for the channel. A sequence of video frames is received from the plurality of video channels, wherein for each channel, video frames are received at a frame rate for that channel. A DMA engine uses descriptors from the list to store video frames as they are received. The list is updated periodically to replace used descriptors.
    Type: Grant
    Filed: July 5, 2011
    Date of Patent: January 7, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Kedar Chitnis, Brijesh Rameshbhal Jadav, Brian Okchon Chae, Manjunath Rudranna Hadli, David Edward Smith, Jr.
  • Publication number: 20130010198
    Abstract: A method for capturing video frames from a plurality of video channels is provided. A list of a least two descriptors is formed for each of the plurality of video channels in a memory accessible to a direct memory access (DMA) engine, wherein each of the two or more descriptors for each channel is programmed to define a storage location for a sequential frame of video data for the channel. A sequence of video frames is received from the plurality of video channels, wherein for each channel, video frames are received at a frame rate for that channel. A DMA engine uses descriptors from the list to store video frames as they are received. The list is updated periodically to replace used descriptors.
    Type: Application
    Filed: July 5, 2011
    Publication date: January 10, 2013
    Inventors: Kedar Chitnis, Brijesh Rameshbhai Jadav, Brian Okchon Chae, Manjunath Rudranna Hadli, David Edward Smith, JR.