Patents by Inventor Brian P. Balut

Brian P. Balut has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230343662
    Abstract: The present disclosure relates to a semiconductor package with a thermally enhanced molding compound. The disclosed semiconductor package includes a module carrier having an upper surface, a die formed over the upper surface of the module carrier, and a thermally enhanced molding compound component formed over the upper surface of module carrier to encapsulate the die. Herein, the thermally enhanced molding compound is formed from a molding compound mixed with a thermal additive and has no air pockets or voids. The thermal additive includes a number of carbon flakes or a number of carbon spherical particles. The thermal additive has a thermal conductivity larger than 450 W/m·K and an electrical resistivity larger than 90 ??.cm. In one embodiment, the thermal additive includes a number of graphene flakes, a number of graphene particles, a number of graphite flakes, or a number of graphite particles.
    Type: Application
    Filed: April 10, 2023
    Publication date: October 26, 2023
    Inventors: Christo Bojkov, Brian P. Balut, Walid Meliane, Matthew Essar
  • Patent number: 9799637
    Abstract: The present disclosure relates to a semiconductor package with a lid that includes a lid conductive structure. The semiconductor package includes a substrate with a top surface, a lid over the top surface of the substrate, and at least one substrate-mounted component mounted on the top surface of the substrate. Herein, a cavity is defined within the lid and over the top surface of the substrate. The substrate includes a metal pad over the top surface of the substrate. The lid includes a lid conductive structure, a lid body, and a perimeter wall that extends from a perimeter of the lid body toward the top surface of the substrate. The lid conductive structure includes a body conductor that extends through a portion of the lid body and a wall conductor that is coupled to the body conductor, extends through the perimeter wall, and is electronically coupled to the metal pad.
    Type: Grant
    Filed: October 13, 2016
    Date of Patent: October 24, 2017
    Assignee: Qorvo US, Inc.
    Inventors: Brian P. Balut, Jonathan Fain, Kevin J. Anderson, Tarak A. Railkar
  • Publication number: 20170236808
    Abstract: The present disclosure relates to a semiconductor package with a lid that includes a lid conductive structure. The semiconductor package includes a substrate with a top surface, a lid over the top surface of the substrate, and at least one substrate-mounted component mounted on the top surface of the substrate. Herein, a cavity is defined within the lid and over the top surface of the substrate. The substrate includes a metal pad over the top surface of the substrate. The lid includes a lid conductive structure, a lid body, and a perimeter wall that extends from a perimeter of the lid body toward the top surface of the substrate. The lid conductive structure includes a body conductor that extends through a portion of the lid body and a wall conductor that is coupled to the body conductor, extends through the perimeter wall, and is electronically coupled to the metal pad.
    Type: Application
    Filed: October 13, 2016
    Publication date: August 17, 2017
    Inventors: Brian P. Balut, Jonathan Fain, Kevin J. Anderson, Tarak A. Railkar