Abstract: A multichannel processor for signals modulated onto a common IF frequency includes first and second analog-to-digital converters (ADC) for first and second channels, respectively. Each ADC receives a 4XIF frequency clock for producing digital samples, which are applied to a pair of gates for alternately coupling the digital signal to two signal paths. Each signal path alternately negates and does not negate the signals passing therethrough, thereby generating baseband I and Q signals for that channel. Since each channel has a separate ADC, there may be amplitude and temporal error between the channels. One of the channels is selected as a reference, and uses a pair of interpolators to produce samples representing the I and Q signal values at a common time between clock pulses. The other channels include controllable interpolators which are adjusted so that their I, Q common times correspond to that of the reference channel.

Abstract: Use of multi-bit digital arctangent function-generator to remove noise-clutter amplitude-modulation from in-phase and quadrature phase multi-bit successive samples of MTI canceller outputs and n-bit running correlation of digitized samples with serial phase code, result in increasing effective CFAR sensitivity of radar receiver.