Abstract: A circuit breaker system and method having zone selective interlock features is provided. The system and method include the transmission of a selective interlock signal from a downstream circuit breaker to an upstream circuit breaker in the event a first or second fault condition is detected. The upstream circuit breaker upon receipt of this signal changes the response of the second circuit breaker depending on whether the first or second fault condition has been detected.

Abstract: A circuit breaker system and method having zone selective interlock features is provided. The system and method include the transmission of a selective interlock signal from a downstream circuit breaker to an upstream circuit breaker in the event a first or second fault condition is detected. The upstream circuit breaker upon receipt of this signal changes the response of the second circuit breaker depending on whether the first or second fault condition has been detected.

Abstract: A circuit breaker system and method having zone selective interlock features is provided. The system and method include the transmission of a selective interlock signal from a downstream circuit breaker to an upstream circuit breaker in the event a first or second fault condition is detected. The upstream circuit breaker upon receipt of this signal changes the response of the second circuit breaker depending on whether the first or second fault condition has been detected.

Abstract: An electronic control for a circuit breaker with automatic breaker rating is disclosed. The electronic control includes a memory to store circuit breaker ratings, a breaker rating switch to select circuit breaker ratings, and a microprocessor operatively coupled to the breaker rating switch and the memory. The microprocessor is configured to interpret a selected circuit breaker rating of the breaker rating switch, set an amplifier gain adjustment for the circuit breaker based on the selected circuit breaker rating, and transmit the selected circuit breaker rating to the memory for storage in the memory.

Abstract: A system for controlling power in a circuit breaker trip unit is disclosed. The system includes: a user interface operably coupled to the trip unit and having a plurality of input keys; a power conditioner operably coupled to the user interface and operably coupled to a battery power source and an external power source; and a power control circuit. The power control circuit is configured to automatically electrically connect the battery power source to the power conditioner in response to activation of any of the plurality of input keys, and in the absence of an electrical connection between the external power source and the power conditioner.

Abstract: A circuit breaker system and method having zone selective interlock features with separate restrained and unrestrained setting capability is provided. The system and method include the transmission of a selective interlock signal from a downstream circuit breaker to an upstream circuit breaker in the event of a fault condition. The upstream circuit breaker upon receipt of this signal changes the tripping response of the second circuit breaker to a restrained mode. The circuit breakers include features enabling the user to modify and adjust both the restrained and unrestrained trip curves associated with both the restrained and unrestrained modes of operation.

Abstract: A circuit breaker system and method having zone selective interlock features with separate restrained and unrestrained setting capability is provided. The system and method include the transmission of a selective interlock signal from a downstream circuit breaker to an upstream circuit breaker in the event of a fault condition. The upstream circuit breaker upon receipt of this signal changes the tripping response of the second circuit breaker to a restrained mode. The circuit breakers include features enabling the user to modify and adjust both the restrained and unrestrained trip curves associated with both the restrained and unrestrained modes of operation.

Abstract: A circuit breaker system and method having zone selective interlock features is provided. The system and method include the transmission of a selective interlock signal from a downstream circuit breaker to an upstream circuit breaker in the event a first or second fault condition is detected. The upstream circuit breaker upon receipt of this signal changes the response of the second circuit breaker depending on whether the first or second fault condition has been detected.

Abstract: An electronic trip unit for a circuit breaker, the electronic trip unit includes a rating plug having a plurality of switches each configured to indicate a specified current rating for the rating plug and for selectively supplying a current rating for the electronic trip unit, a processing unit which receives and reads a value of the selected current rating from the rating plug upon power-up, and a gain control unit including a plurality of gain circuits. Each of the gain circuits including a plurality of gain switches set by the processing unit based upon the selected current rating, to control a gain of input current of the electronic trip unit.

Abstract: A system for controlling power in a circuit breaker trip unit is disclosed. The system includes: a user interface operably coupled to the trip unit and having a plurality of input keys; a power conditioner operably coupled to the user interface and operably coupled to a battery power source and an external power source; and a power control circuit. The power control circuit is configured to automatically electrically connect the battery power source to the power conditioner in response to activation of any of the plurality of input keys, and in the absence of an electrical connection between the external power source and the power conditioner.

Abstract: An electronic control for a circuit breaker with automatic breaker rating is disclosed. The electronic control includes a memory to store circuit breaker ratings, a breaker rating switch to select circuit breaker ratings, and a microprocessor operatively coupled to the breaker rating switch and the memory. The microprocessor is configured to interpret a selected circuit breaker rating of the breaker rating switch, set an amplifier gain adjustment for the circuit breaker based on the selected circuit breaker rating, and transmit the selected circuit breaker rating to the memory for storage in the memory.