Abstract: Embodiments herein describe a SoC with one or more untrusted islands that can host one or more roles or tenants in a data center environment (e.g., a cloud computing environment). In one embodiment, a secure shell encapsulates the untrusted islands with a secure application programming interface (API) to access other hardware resources in the SoC. Hardware resources in the SoC (e.g., HardIP, SoftIP, or both), can either be secure/trusted, or rely on the secure shell to ensure confidentiality.

Abstract: Changing accelerator card images without rebooting a host system includes receiving, within an integrated circuit (IC) of an accelerator card, an address of a platform image stored in a non-volatile memory of the accelerator card. The address is received over a communication link between the host system and the accelerator card while the communication link is connected. Changing accelerator card images includes detecting, within a register of the IC, that a warm boot enable flag is set and that the communication link with the host system is disconnected. In response to detecting that the warm boot enable flag is set and that the communication link is disconnected, loading of the platform image from the address of the non-volatile memory into the integrated circuit is initiated.

Abstract: Time-multiplexing implementation of hardware accelerated functions includes associating each function of a plurality of functions from program code with an accelerator binary image specifying a hardware accelerated version of the associated function and determining which accelerator binary images are data independent. Using the computer hardware, the accelerator binary images can be scheduled for implementation in a programmable integrated circuit within each of a plurality of partial reconfiguration regions based on data independence.

Abstract: An example hardware accelerator for a computer system includes a programmable device and further includes kernel logic configured in a programmable fabric of the programmable device, and an intellectual property (IP) checker circuit in the kernel logic. The IP checker circuit is configured to obtain a device identifier (ID) of the programmable device and a signed whitelist, the signed whitelist including a list of device IDs and a signature, verify the signature of the signed whitelist, compare the device ID against the list of device IDs, and selectively assert or deassert an enable of the kernel logic in response to presence or absence, respectively, of the device ID in the list of device IDs and verification of the signature.

Abstract: An example hardware accelerator for a computer system includes a programmable device and further includes kernel logic configured in a first programmable fabric of the programmable device, a shell circuit configured in a second programmable fabric of the programmable device, the shell circuit configured to provide an interface between a computer system and the kernel logic, and an intellectual property (IP) checker circuit in the kernel logic The IP checker circuit is configured to obtain a device identifier (ID) from the first programmable fabric and a signed whitelist, the signed whitelist including a list of device IDs and a signature, verify the signature of the signed whitelist, compare the device ID against the list of device IDs, and selectively assert or deassert an enable of the kernel logic in response to presence or absence, respectively, of the device ID in the list of device IDs and verification of the signature.

Abstract: Secure updating of programmable integrated circuits includes receiving, within the programmable integrated circuit, a configuration bitstream, inserting, using a processor of the programmable integrated circuit, a key into the configuration bitstream resulting in a modified configuration bitstream, encrypting, using the programmable integrated circuit, the modified configuration bitstream using the key resulting in an encrypted configuration bitstream, and storing the encrypted configuration bitstream in a boot memory for the programmable integrated circuit.

Abstract: Bootstrapping a programmable integrated circuit (IC) based network interface card (NIC) can include implementing, within the programmable IC, a first circuitry by loading a first stage configuration bitstream, wherein the first circuitry includes a bus endpoint configured to communicate with a host computer via a communication bus, a platform processor, and a first bootloader. The platform processor, executing the first bootloader, loads a first firmware within the programmable IC. A second circuitry is implemented within the programmable IC by the platform processor executing the first firmware to load a second stage configuration bitstream. The second circuitry includes a NIC controller. The platform processor, executing the first firmware, loads a second firmware within the programmable IC. The second firmware is executable to configure the second circuitry.

Abstract: An example hardware accelerator for a computer system includes a programmable device and further includes kernel logic configured in a first programmable fabric of the programmable device, a shell circuit configured in a second programmable fabric of the programmable device, the shell circuit configured to provide an interface between a computer system and the kernel logic, and an intellectual property (IP) checker circuit in the kernel logic The IP checker circuit is configured to obtain a device identifier (ID) from the first programmable fabric and a signed whitelist, the signed whitelist including a list of device IDs and a signature, verify the signature of the signed whitelist, compare the device ID against the list of device IDs, and selectively assert or deassert an enable of the kernel logic in response to presence or absence, respectively, of the device ID in the list of device IDs and verification of the signature.

Abstract: An example hardware accelerator for a computer system includes a programmable device and further includes kernel logic configured in a programmable fabric of the programmable device, and an intellectual property (IP) checker circuit in the kernel logic. The IP checker circuit is configured to obtain a device identifier (ID) of the programmable device and a signed whitelist, the signed whitelist including a list of device IDs and a signature, verify the signature of the signed whitelist, compare the device ID against the list of device IDs, and selectively assert or deassert an enable of the kernel logic in response to presence or absence, respectively, of the device ID in the list of device IDs and verification of the signature.

Abstract: Hierarchical partial reconfiguration for integrated circuits includes converting, using computer hardware, a first partial reconfiguration module of a circuit design into a first partial reconfiguration container, wherein the circuit design is placed and routed, loading, using the computer hardware, a first netlist into the first partial reconfiguration container, wherein the first netlist includes a first plurality of partial reconfiguration modules that are initially empty, and including, using the computer hardware, a further netlist within each of the first plurality of partial reconfiguration modules. Using the computer hardware, the first partial reconfiguration container is implemented with the first plurality of partial reconfiguration modules being implemented within the first partial reconfiguration container.

Abstract: Hierarchical partial reconfiguration for integrated circuits includes converting, using computer hardware, a first partial reconfiguration module of a circuit design into a first partial reconfiguration container, wherein the circuit design is placed and routed, loading, using the computer hardware, a first netlist into the first partial reconfiguration container, wherein the first netlist includes a first plurality of partial reconfiguration modules that are initially empty, and including, using the computer hardware, a further netlist within each of the first plurality of partial reconfiguration modules. Using the computer hardware, the first partial reconfiguration container is implemented with the first plurality of partial reconfiguration modules being implemented within the first partial reconfiguration container.

Abstract: Managing an accelerator may include responsive to determining a first container including a first configuration file and a second configuration file, caching, using a host processor, the second configuration file within a local memory of the host processor. The first configuration file may be provided, using the host processor, to a device of the accelerator. Responsive to a configuration event, the host processor may provide the cached second configuration file from the local memory to the device of the accelerator.

Abstract: A merchandising system, including: a consumer product. The merchandising system includes at least one of the consumer product, packaging for the consumer product, and advertisement material pertaining to the consumer product. At least one element of the merchandising system includes indicia and/or an image that relates, or is analogous to, an attribute and/or targeted benefit of the consumer product. At least one element of the merchandising system further includes a micro-optic structure capable of controlling the scatter of light impinging thereon so that the micro-optic structure reflects and/or transmits light in a field of view over which at least a portion of the indicia and/or image appears brighter relative to that outside the field of view.

Abstract: A merchandising system, including: a consumer product. The merchandising system includes at least one of the consumer product, packaging for the consumer product, and advertisement material pertaining to the consumer product. At least one element of the merchandising system includes indicia and/or an image that relates, or is analogous to, an attribute and/or targeted benefit of the consumer product. At least one element of the merchandising system further includes a micro-optic structure capable of controlling the scatter of light impinging thereon so that the micro-optic structure reflects and/or transmits light in a field of view over which at least a portion of the indicia and/or image appears brighter relative to that outside the field of view.

Abstract: A merchandising system, including: a consumer product. The merchandising system includes at least one of the consumer product, packaging for the consumer product, and advertisement material pertaining to the consumer product. At least one element of the merchandising system includes indicia and/or an image that relates, or is analogous to, an attribute and/or targeted benefit of the consumer product. At least one element of the merchandising system further includes a micro-optic structure capable of controlling the scatter of light impinging thereon so that the micro-optic structure reflects and/or transmits light in a field of view over which at least a portion of the indicia and/or image appears brighter relative to that outside the field of view.

Abstract: Microstructured taggant particles, their applications and methods of making the same are described. Precisely formed taggant particles can be formed, in the range of 500? and smaller, from either inert polymers or biodegradable materials bearing information indicia, such as through specific shape, size, color, reflectivity, refractive index, surface geometry, imprinting, optical effect or properties, and electromagnetic properties, to uniquely tag, identify or authenticate articles.

Abstract: Microstructured taggant particles, their applications and methods of making the same are described. Precisely formed taggant particles can be formed, in the range of 500? and smaller, from either inert polymers or biodegradable materials bearing information indicia, such as through specific shape, size, color, reflectivity, refractive index, surface geometry, imprinting, optical effect or properties, and electromagnetic properties, to uniquely tag, identify or authenticate articles.

Abstract: Microstructured taggant particles, their applications and methods of making the same are described. Precisely formed taggant particles can be formed, in the range of 500&mgr; and smaller, from either inert polymers or biodegradable materials bearing information indicia, such as through specific shape, size, color, reflectivity, refractive index, surface geometry, imprinting, optical effect or properties, and electromagnetic properties, to uniquely tag, identify or authenticate articles.