Abstract: A method for wireless communication using a service side-channel signaling and authentication at the physical level. This method comprising the steps of creating at least one transmitting node and one receiving node within a wireless communication channel. Then choosing primary message and a secondary message and generating a valid transmission tag. Then superimposing the valid transmission tag and creating a set of secret codebooks in order to form a side-channel. Then applying key equivocation metric to measure key information leakage to an eavesdropper. Then transmitting said primary message and said secondary message. Then a receiver receiving said primary and said secondary messages detecting fingerprint estimating data combining a key set with the estimated data sending data and key set to a matrix to generate a secret codebook searching for valid tags authenticating and recovering side information.

Abstract: A test setup is provided to test differential signals outputs from the I/O block (IOB) pairs in an integrated circuit (IC). The test setup allows elimination of the external 100 Ohm resistors provided across the differential outputs on a device under test (DUT) test board containing the IC by taking advantage of a 100 Ohm resistor built into the IC between a portion of the IOB pairs. An IOB pair being tested may have its differential output terminal pair shorted to the differential output terminal pair of the IOBs having the internal 100 Ohm resistor.

Abstract: Testing an integrated circuit having programmable logic is described. Programmable logic is configured as a daisy-chain of registers (310-1 through 310-(N+1)) in a closed input/output loop to register a logic 1 and logic 0s. The logic states are circulated around the closed input/output loop. Operation of output blocks (210-1 through 210-N) is controlled responsive to a series of outputs (316-1 through 316-N) provided from a portion of the daisy-chain of registers (310-1 through 310-N) to selectively place an output block of output blocks (210-1 through 210-N) in an output mode responsive to the logic 1 output in the series of outputs while leaving the output blocks remaining in a non-output mode responsive to the logic 0s in the series of outputs. The output blocks (210-1 through 210-N) are commonly coupled at an output node (212) for coupling to a single test channel, as only one output block is in the output mode at a time.

Abstract: A method and apparatus for testing parasitic effects on conducting paths in high-speed systems using a test package which allows for very accurate measurements of the parasitic effects to be taken. The test package is designed to be nearly identical to the actual IC package and has an external connector to allow measurements to be taken through the package, instead of at a point close to the package.

Abstract: An electronic system for identifying a particular line of a plurality of lines in a pulse field, where, for example, the pulse field is either of the 262.5-line composite sync pulse trains produced by a conventional television receiver and the particular line is line 19 designated to carry a Vertical Interval Reference (VIR) signal, comprises digital circuitries for identifying a particular region corresponding to a known line in the pulse field and for counting from the known line to the particular line. Sensing circuitry determines whether a particular information component such as the VIR signal is present in each pulse field, and digital circuitry generates a presence indication signal when a presence indication criterion is met for the particular information component in a given plurality of fields.