Abstract: A method and system for parallel encoding of data for bit-stuffed HDLC compatible transmission is presented. The method analyses a byte in parallel with four recirculated previously encoded bits during each clock cycle. The recirculated bits allow for correct analysis of the presence of a fifth consecutive one within the byte including the first four bits thereof. The encoded byte is provided to a FIFO and, when 8 bits are stored therein, the eight most significant bits are extracted from the FIFO for transmission via a digital or analogue network. The FIFO provides two bytes without receiving an intervening encoded data byte when a risk of an overflow exists.