Patents by Inventor Brian T. Soderberg

Brian T. Soderberg has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5619627
    Abstract: Occulting apparatus for use with an image generator that provides for multiple-level occulting of image data. The occulting apparatus comprises a mask buffer and control logic for processing image data to construct and store an obscurance mask in the mask buffer. Foreground entities contained in the image data are logically ORed into the mask buffer until the entities extend beyond a predefined range from a predetermined image viewpoint. Thereafter, the mask is used by the control logic to reject entities contained in subsequently processed image data that are fully obscured by the foreground entities comprising the obscurance mask. The control logic includes an obscurance manager, a region processor, an object processor, a polygon processor, and insertion logic. The obscurance manager is a controller for building and applying the obscurance mask to the image data.
    Type: Grant
    Filed: May 3, 1994
    Date of Patent: April 8, 1997
    Assignee: Loral Aerospace Corp.
    Inventors: Brian T. Soderberg, Dale D. Miller, Henrik Lind, Richard Jarvis, Mark Kenworthy
  • Patent number: 5493643
    Abstract: An image generator architecture in which tri-level fixed interleave processing provides medium grain parallelism for polygon, tiling, and pixel operations. Input data at each stage are divided into spatially distributed subsets that are interleaved among parallel processors using a fixed, precalculated mapping that minimizes correlation of local scene complexity with any one processor. The present tri-level fixed interleave processing architecture divides a processing task into a pseudo-random, fixed interleaved pattern of regions that are assigned to different processors. Each processor processes many of these randomly located regions. The assignment of processors to regions is a fixed repeating pattern. The highest level of fixed interleave processing is the allocation of fixed-size database regions (area modules) to polygon processors. The next level relates to image sub-region fixed interleave processing.
    Type: Grant
    Filed: May 3, 1994
    Date of Patent: February 20, 1996
    Assignee: Loral Aerospace Corp.
    Inventors: Brian T. Soderberg, Dale D. Miller, Douglas Pheil, Kent Cauble, Mark N. Heinen, Mark L. Kenworthy
  • Patent number: 5471567
    Abstract: Depth buffered anti-aliasing in a real time image generation system utilizing two separate buffers, one for combining attributes of object pixel definitions which are of less than full coverage and another for storing the attributes of each new object pixel definition which is of full coverage and which is closer to the viewpoint than any attributes currently stored. If the depth value in the partial buffer is closer the viewpoint than that in the full buffer, a set of attributes is output which is a weighted mixture of those stored in the two buffers.
    Type: Grant
    Filed: August 8, 1991
    Date of Patent: November 28, 1995
    Assignee: Bolt Beranek and Newman Inc.
    Inventors: Brian T. Soderberg, Mark L. Kenworthy