Abstract: A method of generating pulse width modulated (PWM) signals includes receiving a coarse signal correlated to the widths of pulses to be generated in the PWM signal. Trigger signals are generated and a one-shot device is triggered in response to the trigger signals. The one-shot device generates pulses having widths correlated to the coarse signal. A control signal correlated to the widths of the pulse to be generated in the PWM signal is received and the widths of the pulses generated by the one-shot device are adjusted in response to the control signal.

Abstract: A method of generating pulse width modulated (PWM) signals includes receiving a coarse signal correlated to the widths of pulses to be generated in the PWM signal. Trigger signals are generated and a one-shot device is triggered in response to the trigger signals. The one-shot device generates pulses having widths correlated to the coarse signal. A control signal correlated to the widths of the pulse to be generated in the PWM signal is received and the widths of the pulses generated by the one-shot device are adjusted in response to the control signal.

Abstract: Analog pulse width modulation (PWM) control circuits and techniques are presented for improving output voltage load transient response in controlling DC to DC conversion systems in which a transient detector circuit restarts a PWM carrier ramp waveform to initiate asynchronous injection of a pulse between the regular periodic PWM pulses in a fixed frequency pulse stream to mitigate the effect of output inductor energy depletion on output voltage.

Abstract: A pulse generator generates a square-wave pulsed signal that has a variable pulse width. The pulse width, which is defined by the delay through a delay line, varies in response to variations in an input voltage, as well as in response to phase differences between a reference clock signal and a trigger signal.

Abstract: Pulse width modulation controller apparatus and techniques are presented for balancing output currents of DC-DC converter stages in a multi-stage DC-DC conversion system in which a reference current is provided according to an input voltage and the value of a connected resistor, and a correction current output signal is generated that represents the difference between an average converter stage load current and the local load current, with the on-time of the PWM output signal being generated by charging a capacitance using a charging current obtained by offsetting the reference current output signal with the correction current output signal.

Abstract: A control circuit configured to control a switching power supply including a ramp generator configured to generate a triangular waveform. A comparator is configured to generate a series of pulse width modulated (PWM) pulses at a first frequency and to regulate the switching power supply. The ramp generator includes a capacitor, a charging current source configured to provide a charging current to charge the capacitor, and a discharging current source configured to provide a discharging current to discharge the capacitor. The ramp generator also includes a closed loop current balancing current source configured to balance the currents from the charging and discharging current sources to establish a substantially zero direct current (DC) bias across the capacitor. The controller also includes a multi-phase configuration to provide a stackable multi-channel architecture.

Abstract: A control circuit configured to control a switching power supply including a ramp generator configured to generate a triangular waveform. A comparator is configured to generate a series of pulse width modulated (PWM) pulses at a first frequency and to regulate the switching power supply. The ramp generator includes a capacitor, a charging current source configured to provide a charging current to charge the capacitor, and a discharging current source configured to provide a discharging current to discharge the capacitor. The ramp generator also includes a closed loop current balancing current source configured to balance the currents from the charging and discharging current sources to establish a substantially zero direct current (DC) bias across the capacitor. The controller also includes a multi-phase configuration to provide a stackable multi-channel architecture.

Abstract: Pulse width modulation controller apparatus and techniques are presented for balancing output currents of DC-DC converter stages in a multi-stage DC-DC conversion system in which a reference current is provided according to an input voltage and the value of a connected resistor, and a correction current output signal is generated that represents the difference between an average converter stage load current and the local load current, with the on-time of the PWM output signal being generated by charging a capacitance using a charging current obtained by offsetting the reference current output signal with the correction current output signal.

Abstract: Analog pulse width modulation (PWM) control circuits and techniques are presented for improving output voltage load transient response in controlling DC to DC conversion systems in which a transient detector circuit restarts a PWM carrier ramp waveform to initiate asynchronous injection of a pulse between the regular periodic PWM pulses in a fixed frequency pulse stream to mitigate the effect of output inductor energy depletion on output voltage.

Abstract: A voltage control mode buck converter circuit includes a feedback amplifier providing a comparison signal and a storage circuit in communication with the comparison signal to store a storage comparison signal value. The storage circuit stores the operating conditions for the circuit during normal continuous conduction mode operation in response to sensing a load drop for the circuit. A switching circuit locks the feedback amplifier into the stored operating parameters while the converter circuit operates in non-continuous conduction mode. When the circuit transitions back into the continuous conduction operation mode, the feedback amplifier is already operating at conditions that are compatible with a continuous conduction operation mode.

Abstract: An apparatus is provided. The apparatus comprises a first current source and a second current source that charge and discharge a capacitor. Coupled between the capacitor and the second current source is a switch that can be actuated and deactuated by a controller. Preferably, the controller is coupled to the capacitor and receives a first threshold voltage and a second threshold voltage so that it can actuate the switch if the voltage across the capacitor is greater than the first threshold voltage and deactuate the switch if the voltage across the capacitor is less than the second threshold voltage. Additionally, there is a comparator that is coupled to the capacitor that compares the voltage across the capacitor to a reference voltage, and there is a a multiplexer that is coupled to the capacitor and that is coupled to the comparator.

Abstract: A synchronous buck converter operates in a PWM mode of operation and switches to light-load mode of operation under a light-load condition. When operating in the light-load mode, the synchronous buck converter transitions between a burst mode and an idle mode of operation. In the burst mode of operation, the converter operates with a fixed but increased duty ratio, with respect to the PWM mode of operation, that installs additional energy in an output capacitor. In the idle mode of operation, the high-side and low-side transistors are each turned off. To maximize energy savings and to quickly transition back to the PWM mode of operation if the load increases, a limit as to the number of allowed switching cycles when bursting is imposed and a minimum ratio of the number of clock cycles when idling to the number of switching cycles when bursting is set. Additionally, a comparator is provided to detect a sudden step-increase in the load to quickly switch the converter back to the PWM mode of operation.

Abstract: A programmable parameter or feature is provided for a power converter through a multi-function connection on the converter controller. The parameter or feature selection is active for programming during a startup mode, and the connection is used for other control purposes during a steady state run mode. A reference signal is read on the multifunction connection during startup mode and a selection of a parameter value or feature is made based on a value of the reference signal. The reference signal is compared to preset, internal reference values to select a desired parameter value or feature. An internal preset value is chosen based on the selection and the programming circuitry is disconnected from the connection to permit alternate functionality for the connection. The programmable circuit permits selection from a variety of parameter values or features based on an external signal, without dedicating an external pin on the controller.

Abstract: A synchronous buck converter operates in a PWM mode of operation and switches to light-load mode of operation under a light-load condition. When operating in the light-load mode, the synchronous buck converter transitions between a burst mode and an idle mode of operation. In the burst mode of operation, the converter operates with a fixed but increased duty ratio, with respect to the PWM mode of operation, that installs additional energy in an output capacitor. In the idle mode of operation, the high-side and low-side transistors are each turned off. To maximize energy savings and to quickly transition back to the PWM mode of operation if the load increases, a limit as to the number of allowed switching cycles when bursting is imposed and a minimum ratio of the number of clock cycles when idling to the number of switching cycles when bursting is set. Additionally, a comparator is provided to detect a sudden step-increase in the load to quickly switch the converter back to the PWM mode of operation.

Abstract: An apparatus is provided. The apparatus comprises a first current source and a second current source that charge and discharge a capacitor. Coupled between the capacitor and the second current source is a switch that can be actuated and deactuated by a controller. Preferably, the controller is coupled to the capacitor and receives a first threshold voltage and a second threshold voltage so that it can actuate the switch if the voltage across the capacitor is greater than the first threshold voltage and deactuate the switch if the voltage across the capacitor is less than the second threshold voltage. Additionally, there is a comparator that is coupled to the capacitor that compares the voltage across the capacitor to a reference voltage, and there is a a multiplexer that is coupled to the capacitor and that is coupled to the comparator.

Abstract: A voltage control mode buck converter circuit includes a feedback amplifier providing a comparison signal and a storage circuit in communication with the comparison signal to store a storage comparison signal value. The storage circuit stores the operating conditions for the circuit during normal continuous conduction mode operation in response to sensing a load drop for the circuit. A switching circuit locks the feedback amplifier into the stored operating parameters while the converter circuit operates in non-continuous conduction mode. When the circuit transitions back into the continuous conduction operation mode, the feedback amplifier is already operating at conditions that are compatible with a continuous conduction operation mode.

Abstract: A control device and method for synchronizing activation and deactivation of a high-side switch (102) and a low-side switch (104) in a converter including an input (421) for receiving a reference signal from a signal generator and circuitry (400) coupled to the input and responsive to the reference signal for providing a control signal (422) for the high-side switch (102) having a constant pulse width corresponding the pulse width of the reference signal, and for providing a control signal (423) for the low-side (104) switch having a pulse width which is modulated on both the trailing edge and leading edge thereof for providing synchronization between activation and deactivation of the high-side switch (102) and the low-side switch (104) via the respective control signals.

Abstract: A control device and method for synchronizing activation and deactivation of a high-side switch (102) and a low-side switch (104) in a converter including an input (421) for receiving a reference signal from a signal generator and circuitry (400) coupled to the input and responsive to the reference signal for providing a control signal (422) for the high-side switch (102) having a constant pulse width corresponding the pulse width of the reference signal, and for providing a control signal (423) for the low-side (104) switch having a pulse width which is modulated on both the trailing edge and leading edge thereof for providing synchronization between activation and deactivation of the high-side switch (102) and the low-side switch (104) via the respective control signals.