Abstract: A method for controlling a bus is provided. In particular, an external device may be interfaced with a bus internal to a computer system. The method involves detecting when a device is coupled to the bus, and driving signals onto the bus in response to detecting the device being coupled to the bus. Alternatively, when the external device is not coupled to the bus, the signals are blocked, disabled, or otherwise prevented from being delivered onto the bus.

Abstract: A computer system includes a primary chassis and a secondary chassis. The computer system further includes a primary device having a bus for carrying electrical signals and an external device having a bus for carrying electrical signals. The primary device is disposed in a primary chassis and the external device is disposed in the secondary chassis. The external device is directly electrically interconnected with the primary device so that the electrical signals carried on the primary device bus are transmitted to the secondary bus and the electrical signals carried on the external device bus are transmitted to the primary device bus. A method capable of sharing electrical signals includes transmitting a first electrical signal over a bus of a primary device disposed in a primary chassis and receiving the first electrical signal over a bus of an external device disposed in a secondary chassis.

Abstract: A system for assisting the scanning of a keyboard associated with a personal computer. The system comprises a logic circuit which interacts with the microcontroller and the keyboard to reduce power consumption by the personal computer as well as freeing the microcontroller to do other tasks. The logic circuit "interrupts" the microcontroller whenever keyboard activity is detected. An image RAM stores a pattern of current key closures to be compared in subsequent keyboard scans. A subsequent miscompare between the keyboard and the Image RAM indicates that keyboard activity has occurred. When no keys are pressed, scanning may be stopped. Any key closure will then generate an interrupt, and the microcontroller will restart scanning.

Abstract: A circuit for waking a microprocessor from a sleep mode and providing it with its microprocessor clock long enough for a refresh, direct memory access (DMA) or master cycle operation to be done by external circuitry. The clock signal is then removed from the microprocessor to put it back into the sleep mode, thereby conserving energy. A hold signal is provided to the microprocessor to cause the microprocessor outputs to be put into a tri-state, high impedance condition, and thus relinquish control of the external bus to the external refreshing circuitry.