Patents by Inventor Brian Wang

Brian Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060001443
    Abstract: Apparatus and method for producing memory modules having a plurality of branches connected to a memory bus, each branch containing at least one dynamic random access memory (DRAM) device or SDRAM device connected to the memory bus via at least one transmission signal (TS) line and/or at least one sub-transmission signal (STS) line. The memory modules include at least one branch containing a capacitor connected in parallel to the TS line or STS line and the DRAM device or SDRAM device. A computing system implementing the memory modules is also discussed.
    Type: Application
    Filed: June 30, 2004
    Publication date: January 5, 2006
    Inventors: Brian Wang, Ge Chang
  • Publication number: 20050205638
    Abstract: An orderly single striking device for a nail gun includes a press plate provided with a projection to contact and push always a valve switch to let pressure air to continue flowing into a cylinder of the nail gun so as to move forward the piston with a striking needle to the front position to complete nail striking action, even if the piston should stop at a middle way of its stroke due to some cause and block wind holes in an annular wall of the cylinder after the trigger is pulled for striking a nail. So the device can prevent a nail from being stricken in vain or intermittently, smoothing striking action and upgrading work efficiency of the nail gun.
    Type: Application
    Filed: March 22, 2004
    Publication date: September 22, 2005
    Inventor: Brian Wang
  • Patent number: 6896165
    Abstract: A device for preventing short nails of a nailing gun from being deadlocked includes a slot-sealing member provided under the gunpoint of a nailing gun. The slot sealing member has its topside formed with an elongate slot sealing portion for sealing up the front slot of the nail row inlet of the gunpoint when the slot sealing member is pushed inward, preventing a short nail from being deadlocked when it is struck in a work. When the slot sealing member is pushed outward, its sealing portion will be moved away from the front slot of the nail inlet to completely open the nail row inlet for facilitating loading a long nail formed in a row in the gunpoint, unnecessary to disassemble the slot sealing member from the gunpoint when a row of long nails and short nails are loaded alternately, and easy and quick in operating.
    Type: Grant
    Filed: March 22, 2004
    Date of Patent: May 24, 2005
    Assignee: Bentley Fastening Tools Co., Ltd.
    Inventor: Brian Wang
  • Publication number: 20020068446
    Abstract: A method of forming a self-aligned silicide layer. A refractory metal layer is formed over a substrate having a metal-oxide-semiconductor (MOS) transistor thereon. A self-aligned silicide reaction is conducted to form a self-aligned silicide layer over the gate electrode and source/drain terminal of the transistor. Finally, the unreacted refractory metal layer and the protective layer are removed. The method also includes the formation of an additional protective layer between the refractory metal layer and the original protective layer by physical vapor deposition before conducting the self-aligned silicide reaction.
    Type: Application
    Filed: December 14, 2000
    Publication date: June 6, 2002
    Inventors: Yi-Ju Wu, Yu Chung Chang, Brian Wang
  • Patent number: 6277754
    Abstract: A method of planarizing a dielectric layer comprising the steps of providing a substrate having structures already formed thereon, and then forming a borophosphosilicate glass layer over the substrate. Next, a rapid thermal process is applied heating the borophosphosilicate layer to cause a thermal flow, and then the borophosphosilicate layer is etched back so that a planar surface is obtained. Finally, a passivation layer is formed over the borophosphosilicate glass layer to prevent the formation of pits in subsequent pre-metal wet etching operations.
    Type: Grant
    Filed: April 27, 1998
    Date of Patent: August 21, 2001
    Assignee: United Microelectronics Corp.
    Inventors: Brian Wang, Chih-Ching Hsu
  • Publication number: 20010003606
    Abstract: A method for improving the stability of an anti-reflection coating layer is provided. The anti-reflection coating layer covered by a SiOxNy layer is provided. A surface treatment step is performed with an oxidizer-based plasma on the SiOxNy layer to form an oxide layer. The oxidizer-based plasma comprises O2, and N2O.
    Type: Application
    Filed: June 4, 1999
    Publication date: June 14, 2001
    Inventors: HUNG-YU KOU, BRIAN WANG
  • Patent number: 6200897
    Abstract: A method for manufacturing an even dielectric layer. A substrate having a patterned conductive layer formed thereon is provided. A first dielectric layer with a relatively high dopant dosage is formed on the substrate and the patterned conductive layer. A second dielectric layer with a relatively low dopant dosage is formed on the first dielectric layer. A chemical-mechanical polishing process is formed.
    Type: Grant
    Filed: June 6, 1999
    Date of Patent: March 13, 2001
    Assignees: United Semiconductor Corp., United Microelectronics Corp.
    Inventors: Brian Wang, Chih-Ching Hsu