Patents by Inventor Brice McPherson

Brice McPherson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240105651
    Abstract: A package for power electronics includes a power substrate, a number of power semiconductor die, and a Kelvin connection contact. Each one of the power semiconductor die are on the power substrate and include a first power switching pad, a second power switching pad, a control pad, a semiconductor structure, and a Kelvin connection pad. The semiconductor structure is between the first power switching pad, the second power switching pad, and the control pad, and is configured such that a resistance of a power switching path between the first power switching pad and the second power switching pad is based on a control signal provided at the control pad. The Kelvin connection pad is coupled to the power switching path. The Kelvin connection contact is coupled to the Kelvin connection pad of each one of the power semiconductor die via a Kelvin conductive trace on the power substrate.
    Type: Application
    Filed: December 6, 2023
    Publication date: March 28, 2024
    Inventors: Brice McPherson, Daniel Martin, Jennifer Stabach
  • Patent number: 11923344
    Abstract: A power module is provided with a substrate, power devices, and a housing. The power devices are mounted on device pads of the substrate and arranged to provide a power circuit having a first input, a second input, and at least one output. First and second power terminals provide first and second inputs for the power circuit. At least one output power terminal provides at least one output. The housing encompasses the substrate, the power devices, and portions of the first and second input power terminals as well as the at least one output power terminal. The first and second input power terminals extend out of a first side of the housing, and the at least one output power terminal extends out of a second side of the housing, the first side being opposite the second side.
    Type: Grant
    Filed: November 11, 2021
    Date of Patent: March 5, 2024
    Assignee: WOLFSPEED, INC.
    Inventors: Brice McPherson, Shashwat Singh, Roberto M. Schupbach
  • Publication number: 20240072131
    Abstract: Strategic placement and patterning of electrodes, vias, and metal runners can significantly reduce strain in a power semiconductor die. By modifying the path defining electrodes, vias, and metal runners, as well as patterning the material layers thereof, strain can be better managed to increase reliability of a power semiconductor die.
    Type: Application
    Filed: November 8, 2023
    Publication date: February 29, 2024
    Inventors: Daniel Jenner Lichtenwalner, Edward Robert Van Brunt, Thomas E. Harrington, III, Shadi Sabri, Brett Hull, Brice McPherson, Joe W. McPherson
  • Patent number: 11887953
    Abstract: A package for power electronics includes a power substrate, a number of power semiconductor die, and a Kelvin connection contact. Each one of the power semiconductor die are on the power substrate and include a first power switching pad, a second power switching pad, a control pad, a semiconductor structure, and a Kelvin connection pad. The semiconductor structure is between the first power switching pad, the second power switching pad, and the control pad, and is configured such that a resistance of a power switching path between the first power switching pad and the second power switching pad is based on a control signal provided at the control pad. The Kelvin connection pad is coupled to the power switching path. The Kelvin connection contact is coupled to the Kelvin connection pad of each one of the power semiconductor die via a Kelvin conductive trace on the power substrate.
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: January 30, 2024
    Assignee: Wolfspeed, Inc.
    Inventors: Brice McPherson, Daniel Martin, Jennifer Stabach
  • Patent number: 11869948
    Abstract: Strategic placement and patterning of electrodes, vias, and metal runners can significantly reduce strain in a power semiconductor die. By modifying the path defining electrodes, vias, and metal runners, as well as patterning the material layers thereof, strain can be better managed to increase reliability of a power semiconductor die.
    Type: Grant
    Filed: February 17, 2021
    Date of Patent: January 9, 2024
    Assignee: Wolfspeed, Inc.
    Inventors: Daniel Jenner Lichtenwalner, Edward Robert Van Brunt, Thomas E. Harrington, III, Shadi Sabri, Brett Hull, Brice McPherson, Joe W. McPherson
  • Publication number: 20230411359
    Abstract: A power module has a substrate having a top side with a first device pad and a second device pad. A first plurality of vertical power devices is coupled to the first device pad via first drain contacts, and a second plurality of vertical power devices is coupled to the second device pad via second drain contacts to form part of a power circuit. A housing encompasses portions of the substrate, the first plurality of vertical power devices, and the second plurality of vertical power devices. A first power terminal extends through a top surface of the housing to the first device pad. A second power terminal extends through the top surface of the housing to the source contacts on a top side of the second plurality of vertical power devices. A third power terminal extends through a top surface of the housing to the second device pad.
    Type: Application
    Filed: June 20, 2022
    Publication date: December 21, 2023
    Inventor: Brice McPherson
  • Publication number: 20230363097
    Abstract: A power module is provided with a substrate, power devices, and a housing. The power devices are mounted on device pads of the substrate and arranged to provide a power circuit having a first input, a second input, and at least one output. First and second power terminals provide first and second inputs for the power circuit. At least one output power terminal provides at least one output. The housing encompasses the substrate, the power devices, and portions of the first and second input power terminals as well as the at least one output power terminal.
    Type: Application
    Filed: May 4, 2022
    Publication date: November 9, 2023
    Inventors: Brice McPherson, Shashwat Singh, Roberto M. Schupbach
  • Publication number: 20230335473
    Abstract: The present disclosure describes a power module having a substrate, first and second pluralities of vertical power devices, and first and second terminal assemblies. The substrate has a top surface with a first trace and a second trace. The first plurality of vertical power devices and the second plurality of vertical power devices are electrically coupled to form part of a power circuit. The first plurality of vertical power devices is electrically and mechanically directly coupled between the first trace and a bottom of a first elongated bar of the first terminal assembly. The second plurality of vertical power devices are electrically and mechanically directly coupled between the second trace and a bottom of a second elongated bar of the second terminal assembly.
    Type: Application
    Filed: June 16, 2023
    Publication date: October 19, 2023
    Inventors: Brice McPherson, Brandon Passmore, Roberto M. Schupbach, Jennifer Stabach-Smith
  • Patent number: 11756910
    Abstract: A package for power electronics includes a power substrate, a number of power semiconductor die, and a Kelvin connection contact. Each one of the power semiconductor die are on the power substrate and include a first power switching pad, a second power switching pad, a control pad, a semiconductor structure, and a Kelvin connection pad. The semiconductor structure is between the first power switching pad, the second power switching pad, and the control pad, and is configured such that a resistance of a power switching path between the first power switching pad and the second power switching pad is based on a control signal provided at the control pad. The Kelvin connection pad is coupled to the power switching path. The Kelvin connection contact is coupled to the Kelvin connection pad of each one of the power semiconductor die via a Kelvin conductive trace on the power substrate.
    Type: Grant
    Filed: December 21, 2021
    Date of Patent: September 12, 2023
    Assignee: WOLFSPEED, INC.
    Inventors: Brice McPherson, Daniel Martin, Jennifer Stabach
  • Patent number: 11735488
    Abstract: The present disclosure relates to a power module comprising a substrate, first and second pluralities of vertical power devices, and first and second terminal assemblies. The substrate has a top surface with a first trace and a second trace. The first plurality of vertical power devices and a second plurality of vertical power devices are electrically coupled to form part of a power circuit. The first plurality of vertical power devices are electrically and mechanically directly coupled between the first trace and a bottom of a first elongated bar of the first terminal assembly. The second plurality of vertical power devices are electrically and mechanically directly coupled between the second trace and a bottom of a second elongated bar of the second terminal assembly.
    Type: Grant
    Filed: July 24, 2020
    Date of Patent: August 22, 2023
    Assignee: WOLFSPEED, INC.
    Inventor: Brice McPherson
  • Publication number: 20230260861
    Abstract: Semiconductor packages and, more particularly, semiconductor packages with increased power handling capabilities are disclosed. Semiconductor packages may include lead frame structures and corresponding housings that incorporate semiconductor die. To promote increased current and voltage capabilities, exemplary semiconductor packages include one or more arrangements of creepage extension structures, lead frame structures that may include integral thermal pads, additional thermal elements, and combinations thereof. Creepage extension structures may be arranged as part of top sides of semiconductor packages along with thermal pads of lead frame structures and additional thermal elements. Creepage extension structures may also be arranged as part of top sides and along on one or more peripheral edges of semiconductor packages to promote further increases in power handling.
    Type: Application
    Filed: February 11, 2022
    Publication date: August 17, 2023
    Inventors: Geza Dezsi, Devarajan Balaraman, Brice McPherson
  • Patent number: 11721617
    Abstract: The present disclosure describes a power module having a substrate, first and second pluralities of vertical power devices, and first and second terminal assemblies. The substrate has a top surface with a first trace and a second trace. The first plurality of vertical power devices and the second plurality of vertical power devices are electrically coupled to form part of a power circuit. The first plurality of vertical power devices is electrically and mechanically directly coupled between the first trace and a bottom of a first elongated bar of the first terminal assembly. The second plurality of vertical power devices are electrically and mechanically directly coupled between the second trace and a bottom of a second elongated bar of the second terminal assembly.
    Type: Grant
    Filed: April 23, 2021
    Date of Patent: August 8, 2023
    Assignee: WOLFSPEED, INC.
    Inventors: Brice McPherson, Brandon Passmore, Roberto M. Schupbach, Jennifer Stabach-Smith
  • Patent number: 11696417
    Abstract: A power module including at least one substrate, a housing arranged on the at least one power substrate, a first terminal electrically connected to the at least one power substrate, a second terminal including a contact surface, a third terminal electrically connected to the at least one power substrate, a plurality of power devices arranged on and connected to the at least one power substrate, and the third terminal being electrically connected to at least one of the plurality of power devices. The power module further including a base plate and a plurality of pin fins arranged on the base plate and the plurality of pin fins configured to provide direct cooling for the power module.
    Type: Grant
    Filed: July 7, 2022
    Date of Patent: July 4, 2023
    Assignee: WOLFSPEED, INC.
    Inventors: Matthew Feurtado, Brice McPherson, Daniel Martin, Alexander Lostetter
  • Publication number: 20230142930
    Abstract: A power module is provided with a substrate, power devices, and a housing. The power devices are mounted on device pads of the substrate and arranged to provide a power circuit having a first input, a second input, and at least one output. First and second power terminals provide first and second inputs for the power circuit. At least one output power terminal provides at least one output. The housing encompasses the substrate, the power devices, and portions of the first and second input power terminals as well as the at least one output power terminal. The first and second input power terminals extend out of a first side of the housing, and the at least one output power terminal extends out of a second side of the housing, the first side being opposite the second side.
    Type: Application
    Filed: November 11, 2021
    Publication date: May 11, 2023
    Inventors: Brice McPherson, Shashwat Singh, Roberto M. Schupbach
  • Publication number: 20230060641
    Abstract: Power semiconductor devices, and more particularly arrangements of power semiconductor devices for improved thermal performance in high power applications are disclosed. Arrangements for multiple power semiconductor devices within a package and/or module are provided that more efficiently utilize the active device area of each power semiconductor device for a given operational specification. Certain arrangements are provided that reduce the effects of thermal crowding in order to provide increased power capability or a similar power capability in a reduced device size. Improved thermal balancing may be provided by variable spacing and/or variable offset distances between next-adjacent power semiconductor devices. In this manner, active areas of power devices and/or modules may include an increased density of power semiconductor devices within a given area while also exhibiting improved thermal profiles during operation, thereby providing improved operating characteristics and/or increased operating lifetimes.
    Type: Application
    Filed: August 27, 2021
    Publication date: March 2, 2023
    Inventors: Brice McPherson, Benjamin A. Samples, Brandon Passmore
  • Publication number: 20220354014
    Abstract: A power module including at least one substrate, a housing arranged on the at least one power substrate, a first terminal electrically connected to the at least one power substrate, a second terminal including a contact surface, a third terminal electrically connected to the at least one power substrate, a plurality of power devices arranged on and connected to the at least one power substrate, and the third terminal being electrically connected to at least one of the plurality of power devices. The power module further including a base plate and a plurality of pin fins arranged on the base plate and the plurality of pin fins configured to provide direct cooling for the power module.
    Type: Application
    Filed: July 7, 2022
    Publication date: November 3, 2022
    Inventors: Matthew FEURTADO, Brice MCPHERSON, Daniel MARTIN, Alexander LOSTETTER
  • Patent number: 11445630
    Abstract: A power module including at least one substrate, a housing arranged on the at least one power substrate, a first terminal electrically connected to the at least one power substrate, a second terminal including a contact surface, a third terminal electrically connected to the at least one power substrate, a plurality of power devices arranged on and connected to the at least one power substrate, and the third terminal being electrically connected to at least one of the plurality of power devices. The power module further including a base plate and a plurality of pin fins arranged on the base plate and the plurality of pin fins configured to provide direct cooling for the power module.
    Type: Grant
    Filed: January 15, 2021
    Date of Patent: September 13, 2022
    Assignee: WOLFSPEED, INC.
    Inventors: Matthew Feurtado, Brice McPherson, Daniel Martin, Alexander Lostetter
  • Publication number: 20220262909
    Abstract: Strategic placement and patterning of electrodes, vias, and metal runners can significantly reduce strain in a power semiconductor die. By modifying the path defining electrodes, vias, and metal runners, as well as patterning the material layers thereof, strain can be better managed to increase reliability of a power semiconductor die.
    Type: Application
    Filed: February 17, 2021
    Publication date: August 18, 2022
    Inventors: Daniel Jenner Lichtenwalner, Edward Robert Van Brunt, Thomas E. Harrington, III, Shadi Sabri, Brett Hull, Brice McPherson, Joe W. McPherson
  • Patent number: D969740
    Type: Grant
    Filed: November 5, 2020
    Date of Patent: November 15, 2022
    Assignee: WOLFSPEED, INC.
    Inventors: Brice McPherson, Alexander Lostetter
  • Patent number: D985517
    Type: Grant
    Filed: December 29, 2021
    Date of Patent: May 9, 2023
    Assignee: WOLFSPEED, INC
    Inventors: Brice McPherson, Matthew Feurtado