Abstract: A method of manufacturing a piezoelectric structure comprises providing a substrate of piezoelectric material, providing a carrier substrate, depositing a dielectric bonding layer at a temperature lower than or equal to 300° C. on a single side of the substrate of piezoelectric material, a step of joining the substrate of piezoelectric material to the carrier substrate via the dielectric bonding layer, a thinning step for forming the piezoelectric structure, which comprises a layer of piezoelectric material joined to a carrier substrate.

Abstract: A process for manufacturing a piezoelectric structure for a radiofrequency device comprises providing a substrate of piezoelectric material, providing a carrier substrate, providing a dielectric bonding layer on the substrate of piezoelectric material, a step of joining the substrate of piezoelectric material to the carrier substrate via the dielectric bonding layer, and a thinning step for forming the piezoelectric structure, which comprises a layer of piezoelectric material joined to a carrier substrate via the dielectric bonding layer.

Abstract: A process for producing an electronic component includes covering a substrate with a portion defining, with the substrate, a volume at least partly filled with a temporary material. The temporary material is then removed via chimney for access to said volume. A deposition of a fill material is then made in said volume, the fill material being obtained from precursors supplied via the chimney. The process is particularly suitable for producing a gate of an MOS-type transistor. In this case, the fill material is conducting or semiconducting, and an electrically insulating coating material may also be deposited in said volume before the (semi) conducting fill material. The process also includes defining a trench in a substrate filled with a temporary material. The filled trench is then covered with a circuit portion. The temporary material is then removed via a chimney for access to the trench. A deposition of low dielectric fill material is then made in the trench.

Abstract: A phase of siliciding a transistor includes formation, from a first metal (8), of a first metal silicide (80) on the drain and source regions, while the gate region (30) is protected by a layer of hard mask (40), removal of the hard mask, formation, from a second metal (9), of a second metal silicide (90) on the gate region, while the first metal silicide (80) is protected by the second metal (9), and removal of the second metal (9).

Abstract: A process for producing an electronic component includes covering a substrate with a portion defining, with the substrate, a volume at least partly filled with a temporary material. The temporary material is then removed via chimney for access to said volume. A deposition of a fill material is then made in said volume, the fill material being obtained from precursors supplied via the chimney. The process is particularly suitable for producing a gate of an MOS-type transistor. In this case, the fill material is conducting or semiconducting, and an electrically insulating coating material may also be deposited in said volume before the (semi)conducting fill material. The process also includes defining a trench in a substrate filled with a temporary material. The filled trench is then covered with a circuit portion. The temporary material is then removed via a chimney for access to the trench. A deposition of low dielectric fill material is then made in the trench.