Patents by Inventor Britto Vincent

Britto Vincent has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6754771
    Abstract: A system can use a dynamic memory allocation technique to selectively transfer data between storage devices in the system. This dynamic memory allocation technique can simulate hard memory in software, which improves the efficiency of data transfers between the storage devices and dramatically increases system performance. The system may include a mass memory that stores application data and non-application data, a dump memory for receiving application data and non-application data from the mass memory, and a memory array for receiving only application data from the dump memory. The system may further include computer-readable instructions for performing the data transfers between the mass memory, the dump memory, and the memory array.
    Type: Grant
    Filed: August 7, 2001
    Date of Patent: June 22, 2004
    Assignee: Synopsys, Inc.
    Inventor: Britto Vincent
  • Publication number: 20020073291
    Abstract: The present invention is directed to an article and system for the selective transfer or filtering of data between storage devices using the application data itself with dynamic memory allocation to make the selection or create the filter criteria. A logic simulation device can utilize a dynamic memory allocation algorithm to simulate hard memory in software which improves the efficiency of data transfers between memory devices and dramatically increases performance of the logic simulation device.
    Type: Application
    Filed: August 7, 2001
    Publication date: June 13, 2002
    Inventor: Britto Vincent
  • Patent number: 6321295
    Abstract: A system and method for selective transfer of application data between storage devices in a computer system. Application data and non-application data are stored in a mass memory device. The application data and non-application data are received in a dump memory. Data in the dump memory is examined to identify the application data. A secondary address for the application data is derived. Application data from the dump memory indicated by the secondary address is received by a memory array. The application data indicated by the secondary address is parsed. Parsed application data is transferred from the memory array to dump memory. The parsed application data and the non-application data are transferred from the dump memory to the mass memory device. Finally, unexamined data is dumped from the mass memory device to the dump memory. The application data in one example represents a circuit to be simulated and the circuit could be described in a hardware description language such as VERILOG.
    Type: Grant
    Filed: March 19, 1998
    Date of Patent: November 20, 2001
    Assignee: inSilicon Corporation
    Inventor: Britto Vincent