Patents by Inventor Bror Peterson

Bror Peterson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260047456
    Abstract: A three-dimensional (3D) packaging device is provided. The 3D packaging device includes an interposer substrate, and a plurality of connection structures in the interposer substrate. The plurality of connection structures are configured to transmit at least one of an electrical signal, heat, fluid, or an optical signal.
    Type: Application
    Filed: June 5, 2025
    Publication date: February 12, 2026
    Inventors: Tarak A. Railkar, Jeffrey N. Miller, Salvatore Finocchiaro, Bror Peterson
  • Publication number: 20260018478
    Abstract: The present disclosure relates to a flip-chip based moisture-resistant module, which includes a substrate with a top surface, a flip-chip die, a sheet-mold film, and a barrier layer. The flip-chip die has a die body and a number of interconnects, each of which extends outward from a bottom surface of the die body and is attached to the top surface of the substrate. The sheet-mold film directly encapsulates sides of the die body, extends towards the top surface of the substrate, and directly adheres to the top surface of the substrate, such that an air-cavity with a perimeter defined by the sheet-mold film is formed between the bottom surface of the die body and the top surface of the substrate. The barrier layer is formed directly over the sheet-mold film, fully covers the sides of the die body, and extends horizontally beyond the flip-chip die.
    Type: Application
    Filed: May 22, 2025
    Publication date: January 15, 2026
    Inventors: Tarak A. Railkar, Kevin J. Anderson, Bror Peterson, Andrew Arthur Ketterson, Deep C. Dumka
  • Publication number: 20250385423
    Abstract: An antenna package is disclosed. The antenna package includes a beam former circuit, a second die with an integrated circuit that may have power amplifier circuitry, and an antenna array. The antenna package is assembled into a multilayer substrate with the die on a first level with externally accessible contact points. The second die may be positioned within the substrate with no externally accessible contact points and be coupled to the first die, with vias having little or no lateral translation of signal paths on metal layers of the substrate. The antenna array may be positioned on a top layer opposite the first layer and thus be positioned to radiate effectively for signal transmission (or receive signal without obstruction from the package). The antenna array may likewise be coupled to the second die, with vias having little or no lateral translation of signal paths on metal layers of the substrate.
    Type: Application
    Filed: March 19, 2025
    Publication date: December 18, 2025
    Inventors: Anthony Chiu, Andrew Arthur Ketterson, Bror Peterson
  • Publication number: 20250380353
    Abstract: In some embodiments, a printed circuit board is disclosed. The printed circuit board includes a substrate, a conductive plane, and at least one switch. The conductive plane includes an edge enabled void construction (EEVC) along a geometric perimeter of the conductive plane, the EEVC having an EEVC void that defines an EEVC perimeter that extends into the conductive plane.
    Type: Application
    Filed: August 28, 2025
    Publication date: December 11, 2025
    Inventors: Jan-Willem Zweers, Richard Perkins, Bror Peterson
  • Publication number: 20250357679
    Abstract: Disclosed herein are windowed radio frequency circuit modules for use with tile array packages and methods of configuration, assembly, and use of such modules and packages. For example, an apparatus is disclosed. In some embodiments, the apparatus includes a planar laminate having a window, wherein the planar laminate has a first side and a second side. The apparatus may further include a plurality of radio frequency circuit elements interconnected and distributed between the first side and the second side; and a plurality of chip pads on the first side. In addition, the apparatus may be configured to connect to an electronics assembly via the plurality of chip pads, wherein the electronics assembly comprises a beamformer integrated circuit, and wherein the apparatus is configured such that, after connection with the electronics assembly, the beamformer integrated circuit extends into the window.
    Type: Application
    Filed: April 18, 2025
    Publication date: November 20, 2025
    Inventors: Salvatore Finocchiaro, Bror Peterson
  • Patent number: 12439509
    Abstract: In some embodiments, a printed circuit board is disclosed. The printed circuit board includes a substrate, a conductive plane, and at least one switch. The conductive plane includes an edge enabled void construction (EEVC) along a geometric perimeter of the conductive plane, the EEVC having an EEVC void that defines an EEVC perimeter that extends into the conductive plane.
    Type: Grant
    Filed: March 27, 2023
    Date of Patent: October 7, 2025
    Assignee: Qorvo US, Inc.
    Inventors: Jan-Willem Zweers, Richard Perkins, Bror Peterson
  • Patent number: 12375063
    Abstract: Disclosed is a filter bank die having a first acoustic wave (AW) filter having a first antenna terminal and a first filter terminal, and a second AW filter having a second filter terminal, and a second antenna terminal coupled to the first antenna terminal to effectively diplex signals that pass through the first AW filter and the second AW filter.
    Type: Grant
    Filed: June 9, 2021
    Date of Patent: July 29, 2025
    Assignee: Qorvo US, Inc.
    Inventors: Gangadhar Burra, Bror Peterson, Richard Perkins, Chris Levesque
  • Patent number: 12149230
    Abstract: Disclosed is a filter bank die that includes a first acoustic wave (AW) filter having a first antenna terminal coupled to the antenna port terminal and a first filter terminal, wherein the first AW filter is configured to have a filter skirt with a slope that spans at least a 100 MHz gap between adjacent passbands, and a second AW filter having a second filter terminal, and a second antenna terminal coupled to the first antenna terminal to effectively diplex signals that pass through the first AW filter and the second AW filter.
    Type: Grant
    Filed: June 9, 2021
    Date of Patent: November 19, 2024
    Assignee: Qorvo US, Inc.
    Inventors: Gangadhar Burra, Bror Peterson, Richard Perkins, Chris Levesque
  • Publication number: 20240235500
    Abstract: A digital compensation system for a radio frequency (RF) power amplifier module is disclosed. The digital compensation system includes an RF power amplifier having a first input, a first output, and a first bias input, wherein the RF power amplifier is configured to receive an RF signal at the first input and generate an amplified version of the RF signal at the first output. The digital compensation system also includes compensation circuitry coupled between the first input and the first output and a bias output coupled to the RF power amplifier, wherein the compensation circuitry is configured, in response to the RF signal, to generate or adjust a bias signal at the first bias input to correct dynamic bias errors caused by amplification variations that have time constants.
    Type: Application
    Filed: March 27, 2024
    Publication date: July 11, 2024
    Inventors: Frederick L. Martin, Gangadhar Burra, Nikolaus Klemmer, Paul Edward Gorday, Bror Peterson
  • Patent number: 12015430
    Abstract: Disclosed is a filter bank module having a substrate, an antenna port terminal, and a filter bank die. The filter bank die is fixed to the substrate and includes a first acoustic wave (AW) filter having a first antenna terminal coupled to the antenna port terminal and a first filter terminal, and a second AW filter having a second filter terminal, and a second antenna terminal coupled to the first antenna terminal to effectively diplex signals that pass through the first AW filter and the second AW filter.
    Type: Grant
    Filed: June 9, 2021
    Date of Patent: June 18, 2024
    Assignee: Qorvo US, Inc.
    Inventors: Gangadhar Burra, Bror Peterson, Richard Perkins, Chris Levesque
  • Patent number: 11996810
    Abstract: A digital compensation system for a radio frequency (RF) power amplifier module is disclosed. The digital compensation system includes an RF power amplifier having a first input, a first output, and a first bias input, wherein the RF power amplifier is configured to receive an RF signal at the first input and generate an amplified version of the RF signal at the first output. The digital compensation system also includes compensation circuitry coupled between the first input and the first output and a bias output coupled to the RF power amplifier, wherein the compensation circuitry is configured, in response to the RF signal, to generate or adjust a bias signal at the first bias input to correct dynamic bias errors caused by amplification variations that have time constants.
    Type: Grant
    Filed: April 30, 2021
    Date of Patent: May 28, 2024
    Assignee: Qorvo US, Inc.
    Inventors: Frederick L. Martin, Gangadhar Burra, Nikolaus Klemmer, Paul Edward Gorday, Bror Peterson
  • Patent number: 11916541
    Abstract: Disclosed is a filter bank module having a substrate, an antenna port terminal, and a filter bank die. The filter bank die is fixed to the substrate and includes a first acoustic wave (AW) filter having a first antenna terminal coupled to the antenna port terminal and a first filter terminal, wherein the first AW filter is configured to pass a first passband and attenuate frequencies outside the first passband, and a second AW filter having a second filter terminal, and a second antenna terminal coupled to the first antenna terminal to effectively diplex signals that pass through the first AW filter and the second AW filter, wherein the second AW filter is configured to pass a second passband that is spaced from the first passband to minimize interference between first bandpass and the second bandpass while attenuating frequencies outside the second passband.
    Type: Grant
    Filed: June 9, 2021
    Date of Patent: February 27, 2024
    Assignee: Qorvo US, Inc.
    Inventors: Gangadhar Burra, Bror Peterson, Richard Perkins, Chris Levesque
  • Publication number: 20230319982
    Abstract: In some embodiments, a printed circuit board is disclosed. The printed circuit board includes a substrate, a conductive plane, and at least one switch. The conductive plane includes an edge enabled void construction (EEVC) along a geometric perimeter of the conductive plane, the EEVC having an EEVC void that defines an EEVC perimeter that extends into the conductive plane.
    Type: Application
    Filed: March 27, 2023
    Publication date: October 5, 2023
    Inventors: Jan-Willem Zweers, Richard Perkins, Bror Peterson
  • Patent number: 11699629
    Abstract: The disclosure is directed to an integrated circuit (IC) die stacked with a backer die, including capacitors and thermal vias. The backer die includes a substrate material to contain and electrically insulate one or more capacitors at a back of the IC die. The backer die further includes a thermal material that is more thermally conductive than the substrate material for thermal spreading and increased heat dissipation. In particular, the backer die electrically couples capacitors to the IC die in a stacked configuration while also spreading and dissipating heat from the IC die. Such a configuration reduces an overall footprint of the electronic device, resulting in decreased integrated circuits (IC) packages and module sizes. In other words, instead of placing the capacitors next to the IC die, the capacitors are stacked on top of the IC die, thereby reducing an overall surface area of the package.
    Type: Grant
    Filed: March 26, 2021
    Date of Patent: July 11, 2023
    Assignee: Qorvo US, Inc.
    Inventors: Anthony Chiu, Bror Peterson, Andrew Ketterson
  • Publication number: 20220399875
    Abstract: Disclosed is a filter bank die that includes a first acoustic wave (AW) filter having a first antenna terminal coupled to the antenna port terminal and a first filter terminal, wherein the first AW filter is configured to have a filter skirt with a slope that spans at least a 100 MHz gap between adjacent passbands, and a second AW filter having a second filter terminal, and a second antenna terminal coupled to the first antenna terminal to effectively diplex signals that pass through the first AW filter and the second AW filter.
    Type: Application
    Filed: June 9, 2021
    Publication date: December 15, 2022
    Inventors: Gangadhar Burra, Bror Peterson, Richard Perkins, Chris Levesque
  • Publication number: 20220399876
    Abstract: Disclosed is a filter bank die having a first acoustic wave (AW) filter having a first antenna terminal and a first filter terminal, and a second AW filter having a second filter terminal, and a second antenna terminal coupled to the first antenna terminal to effectively diplex signals that pass through the first AW filter and the second AW filter.
    Type: Application
    Filed: June 9, 2021
    Publication date: December 15, 2022
    Inventors: Gangadhar Burra, Bror Peterson, Richard Perkins, Chris Levesque
  • Publication number: 20220399908
    Abstract: Disclosed is a filter bank module having a substrate, an antenna port terminal, and a filter bank die. The filter bank die is fixed to the substrate and includes a first acoustic wave (AW) filter having a first antenna terminal coupled to the antenna port terminal and a first filter terminal, and a second AW filter having a second filter terminal, and a second antenna terminal coupled to the first antenna terminal to effectively diplex signals that pass through the first AW filter and the second AW filter.
    Type: Application
    Filed: June 9, 2021
    Publication date: December 15, 2022
    Inventors: Gangadhar Burra, Bror Peterson, Richard Perkins, Chris Levesque
  • Publication number: 20220399877
    Abstract: Disclosed is a filter bank module having a substrate, an antenna port terminal, and a filter bank die. The filter bank die is fixed to the substrate and includes a first acoustic wave (AW) filter having a first antenna terminal coupled to the antenna port terminal and a first filter terminal, wherein the first AW filter is configured to pass a first passband and attenuate frequencies outside the first passband, and a second AW filter having a second filter terminal, and a second antenna terminal coupled to the first antenna terminal to effectively diplex signals that pass through the first AW filter and the second AW filter, wherein the second AW filter is configured to pass a second passband that is spaced from the first passband to minimize interference between first bandpass and the second bandpass while attenuating frequencies outside the second passband.
    Type: Application
    Filed: June 9, 2021
    Publication date: December 15, 2022
    Inventors: Gangadhar Burra, Bror Peterson, Richard Perkins, Chris Levesque
  • Publication number: 20220310471
    Abstract: The disclosure is directed to an integrated circuit (IC) die stacked with a backer die, including capacitors and thermal vias. The backer die includes a substrate material to contain and electrically insulate one or more capacitors at a back of the IC die. The backer die further includes a thermal material that is more thermally conductive than the substrate material for thermal spreading and increased heat dissipation. In particular, the backer die electrically couples capacitors to the IC die in a stacked configuration while also spreading and dissipating heat from the IC die. Such a configuration reduces an overall footprint of the electronic device, resulting in decreased integrated circuits (IC) packages and module sizes. In other words, instead of placing the capacitors next to the IC die, the capacitors are stacked on top of the IC die, thereby reducing an overall surface area of the package.
    Type: Application
    Filed: March 26, 2021
    Publication date: September 29, 2022
    Inventors: Anthony Chiu, Bror Peterson, Andrew Ketterson
  • Patent number: 11368175
    Abstract: A radio frequency (RF) control circuit is provided. The RF control circuit includes power amplifier (PA) circuitry for amplifying an RF signal and control circuitry configured to improve linearity of the PA circuitry based on a PA signature(s) already available and utilized to perform digital pre-distortion (DPD) in the RF control circuit. In examples discussed herein, the control circuitry determines a performance deviation of the PA circuitry based on the PA signature and continuously adjusts a bias voltage(s) supplied to the PA circuitry until the performance deviation is reduced to a predetermined performance deviation threshold. By continuously monitoring the performance deviation based on the PA signature(s) and adjusting the bias voltage(s), the control circuitry can detect and correct an operation abnormality of the PA circuitry in a timely manner. As a result, it is possible to maintain linearity in the PA circuitry for enhanced PA performance.
    Type: Grant
    Filed: February 23, 2018
    Date of Patent: June 21, 2022
    Assignee: QORVO US, INC.
    Inventors: Jose Jimenez, Bror Peterson, Jeffrey Gengler