Abstract: A mobile device and a method and circuit for determining a position of the mobile device is disclosed. A positioning signal is received at a communication circuit of the mobile device. The received positioning signal is sent from the communication circuit to a position-determining module for determining the position of the mobile device from the positioning signal. A switch may be configured to selectively couple the position-determining module to the communication circuit.

Abstract: A mobile device and a method and circuit for determining a position of the mobile device is disclosed. A positioning signal is received at a communication circuit of the mobile device. The received positioning signal is sent from the communication circuit to a position-determining module for determining the position of the mobile device from the positioning signal. A switch may be configured to selectively couple the position-determining module to the communication circuit.

Abstract: A mobile wireless communication device (200) including a wireless transceiver (210) communicably coupled to a processor (220), a satellite positioning system receiver (250), wherein the processor controls an operating mode of the satellite positioning system receiver based on satellite positioning system operating mode information received by the wireless transceiver when the mobile wireless communication device is in a vicinity of a location or will be in the vicinity on which the satellite positioning system operating mode information is based. Controlling the operating mode includes controller whether and when and the frequency with which location measurements are made.

Abstract: An energy constrained device (100) includes a motion sensor (150) operative to detect motion of the device (100); a device position determinator (130); and a controller (110) operatively coupled at the motion sensor (150) and to the device position determinator (130) and operative to receive a device location request for the energy constrained device (100), to determine whether the energy constrained device (100) has moved based on the motion sensor (150), and to determine whether to request position information from the device position determinator (130) based on device movement. A method for saving power for a device position determinator (130) in a energy constrained device (100) includes determining whether position information has been requested from the device position determinator (130); and if not so, automatically switching the device position determinator (130) to a low power consumption mode.

Abstract: A method of fabricating submicron HFETs includes forming a buffered substrate structure with a supporting substrate of GaAs, a portion of low temperature AlGaAs grown on the supporting substrate at a temperature of approximately 300.degree. C., a layer of low temperature GaAs grown on the portion AlGaAs layer at a temperature of 200.degree. C., a layer of low temperature AlGaAs grown on the GaAs layer at a temperature of 400.degree. C., and a buffer layer of undoped GaAs grown on the second AlGaAs layer. Complementary pairs of HFETs can be formed on the buffered substrate structure, since the structure supports the operation of p and n type transistors equally well.

Abstract: A method and structure for reducing capacitance between interconnect lines (11, 24, 26) utilizes air gaps (17, 47) between the interconnect lines (11, 24, 26). Deposited over the interconnect lines (11, 24, 26), a silane oxide layer (14) forms a "breadloaf" shape which can be sputter etched to seal the air gaps (17, 47). Prior to the deposition of the sputter etched silane oxide layer (14), spacers (13, 42, 43) can be formed around the interconnect lines (11, 24, 26) to increase the aspect ratio of gaps (23, 31) between the interconnect lines (11, 24, 26) which facilitates the formation of the "breadloaf" shape of the silane oxide layer (14).

Abstract: A III-V semiconductor FET (10, 30, 40) having etched ohmic contacts (19, 20, 36, 37, 43, 44). A gate (16) of the FET (10, 30, 40) is formed in contact with a surface of a III-V substrate (11). An ohmic contact (19, 20, 36, 37, 43, 44) is created to include an alloy in contact with the surface of the substrate (11). The ohmic contact (19, 20, 36, 37, 43, 44) is formed to abut the gate structure (16, 17, 18) by covering a portion of the gate structure (16, 17, 18) and the substrate (11) with the ohmic contact (19, 20, 36, 37, 43, 44), then, removing portions of the ohmic contact from the gate structure (16, 17, 18) by etching. The ohmic contact (19, 20, 36, 37, 43, 44) is formed to be substantially devoid of gold.

Abstract: A method of manufacturing a semiconductor device gate is provided that reduces gate length variability while maintaining self-alignment and eliminating etch damage and substrate contamination. A gate opening (18) is formed in an oxide layer (16) using a anisotropic etch. The anisotropic etch creates a reverse gate metal image that has low gate length variability. Dual metal gate (26) is then deposited. The excess gate metal is then removed and the top surface (31) of the gate (30) planarized using a chemical mechanical polish. The remaining oxide (16) is then removed, leaving a precise gate (30). The use of a nitride barrier (12) and of an etchstop layer (14) of aluminum nitride under the oxide layer (16) is also shown.

Abstract: The present invention provides a III-V semiconductor FET (10, 30, 40) having etched ohmic contacts (19, 20, 36, 37, 43, 44). A gate (16) of the FET (10, 30, 40) is formed in contact with a surface of a III-V substrate (11). An ohmic contact (19, 20, 36, 37, 43, 44) is created to include an alloy in contact with the surface of the substrate (11). The ohmic contact (19, 20, 36, 37, 43, 44) is formed to abut the gate structure (16, 17, 18) by covering a portion of the gate structure (16, 17, 18) and the substrate (11) with the ohmic contact (19, 20, 36, 37, 43, 44), then, removing portions of the ohmic contact from the gate structure (16, 17, 18) by etching. The ohmic contact (19, 20, 36, 37, 43, 44) is formed to be substantially devoid of gold.