Abstract: Stack tracebacks are performed in debugging and exception handling routines, and involve providing the values of non-volatile registers at the time of entry into each function in a call chain. One stack traceback technique includes performing the following two steps for each virtual address at which a function call in the call chain is made: (1) locating the tag section whose virtual address range includes the virtual address; and (2) locating a tag in the tag section found in step (1), whose virtual address range includes the virtual address. The tag found in step (2) indicates which of the values, if any, respectively held by the non-volatile registers upon entry to the particular function in which the above function call is made, are stored in a stack frame for the particular function at the time of the function call.

Abstract: In order to incorporate a very high speed memory subsystem into a computer system utilizing unified bus architecture, memory control apparatus associated with the very high speed memory is provided with a first port communicating directly with a system central processor and a second port interfacing with the unified bus. The memory control apparatus may include means for systematically refreshing volatile high speed memories. Multiple processor systems may be realized by taking advantage of the dual port characteristics of the very high speed memory subsystems associated with each central processor.