Abstract: A computer system includes a computer address modification system that is advantageously coupled in a bus network to selectively translate memory address data in 16K blocks and provide DMA addresses which may match the 16 K memory address blocks. The modification system includes a mapping RAM selectively providing translated addresses to enable addresses in a 16 megabyte extended address space. The modification system also includes a page register storing for each addressable 16K block of data for each DMA channel a page address within the extended address space.

Abstract: A disk drive system includes a disk drive controller system having separate head positioning and data transfer subsystems and supporting up to four disk drives, two of which may be removable and two of which may connect through a standard ST506 interface. The system provides a read and write protected cylinder for removably drive and a read only cylinder for removable drives which may store a unique serial number as well as other write protected data. Each removable disk drive may includes a register storing an identification code which may be used to control operation of the drive.

Abstract: A disk drive system includes a disk controller system having separate head positioning and data transfer subsystems and supporting up to four disk drives, two of which may be removable, portable drive units and two of which may connect through a standard ST506 interface. The removable disk drives incorporate a read and write protected data cylinder for storing information such as the maintenance history of the drive, and a read only cylinder for storing a unique serial number as well as other write protected data. The system also features a high capacity, high speed sector buffer which allows continuous transfers of data to or from noninterleaved sectors and supports concurrent disk and system accesses.

Abstract: A disk drive system includes a disk controller system having separate head positioning and data transfer subsystems and supporting up to four disk drives, two of which may be removable and two of which may connect through a standard ST506 interface. The system provides a read and write protected cylinder for removable drives, a read only cylinder for removable drives which may store a unique serial number as well as other write protected data, and a high capacity, high speed sector buffer which allows continuous transfers of data to or from noninterleaved sectors and supports concurrent disk and system accesses.

Abstract: A computer system includes a computer address modification system that is advantageously coupled in a bus network to selectively translate memory address data in 16K blocks and provide DMA page addresses which may match the 16K memory address blocks. The modification system includes a mapping RAM selectively providing translated addresses to enable addresses in a 1 megabyte address space to be selectively mapped to a 16 megabyte extended address space. The modification system also includes a page register storing for each addressable 16K block of data for each DMA channel a page address within the extended address space.

Abstract: A computer system includes a computer address modification system that is advantageously coupled in a bus network to selectively translate memory address data in 16K blocks and provide DMA page addresses in 16K blocks which may match the 16K memory address blocks. The modification system includes a mapping RAM selectively providing translated addresses to enable addresses in a 16 megabyte extended address space. The modification system also includes a page register storing for each addressable 16K block of data for each DMA channel a page address within the extended address space.

Abstract: A point of sale system having an active and a spare data processing system, each including separate read/write memories, with only one of the systems being active at a given time, but with the active system being able to selectively acquire data from the read/write memory of the spare system upon start-up and including means for verifying which read/write memory of the active or the spare system contains valid, most current data which is then transferred to whichever system is the active system, the read/write memories of each of the two systems having a built-in generation number counter which is incremented by one whenever either the data of the inactive read/write memory is caused to be transferred to the active read/write memory or whenever the counts in the generation number counters of both read/write memories are equal, this change in the generation number counters taking place only at the start-up of the system.