Abstract: Methods and systems for securing data are provided. For example, one method includes providing context information for an input/output (I/O) operation to a security module by an adapter communicating with a computing device and a storage device via a network; storing encryption parameters associated to a security association handle by the security module; using a workflow handle by the security module to obtain the security association handle for retrieving stored encryption parameters for encrypting payload transmitted by the adapter and for decrypting payload received by the adapter; predicting a first frame header for encrypting the payload transmitted by the adapter and a second frame header for decrypting payload received by the adapter; providing the encrypted payload for transmission to the adapter by the security module, after discarding the first predicted header; and providing the decrypted payload to the computing device by the security module, after discarding the second predicted header.

Abstract: Methods and systems for routing control blocks is provided. One method includes receiving a control block from a computing device at an adapter having a plurality of hardware engines for processing control blocks, where the control blocks are to read data, write data, obtain status for an input/output request and perform a management task; evaluating the control block by the adapter to determine that the control block is a continuation control block for data transfer using more than one control block; is a direct route control block for a specific hardware engine; or is for a management task; routing the control block to a same hardware engine when the control block is a continuation control block; and routing the control block to a master hardware engine from among the plurality of hardware engines, when the control block is for the management task.

Abstract: Methods and systems for network communications are disclosed. The target device receives a request for a network connection from an initiator device, the request indicating a desire to bypass transport communication layer processing. The target device accepts the request and sends a response to the initiator device indicating an agreement to bypass the transport layer processing. The target device then receives a frame from the initiator device and processes the frame by bypassing the transport communication layer processing.

Abstract: A network device is provided. The network device includes a port complex having a plurality of ports configured to operate at different operating speeds for sending and receiving information complying with different protocols. The network device further includes a processor complex having a plurality of processors for processing information complying with different protocols and received by the plurality of ports; and a message queuing system (MQS) for managing messages for the plurality of processors regarding the received information complying with different protocols. Each processor can process information complying with any of the different protocols.

Abstract: Network device for sending and receiving information is provided. The network device includes a port having a receive segment for receiving information and a transmit segment for transmitting information. The port can be configured to operate as an independent port using a single link operating at 25 gigabits per second.

Abstract: A network device is provided. The network device includes a port complex having a plurality of ports configured to operate at different operating speeds for sending and receiving information complying with different protocols. The network device further includes a processor complex having a plurality of processors for processing information complying with different protocols and received by the plurality of ports; and a message queuing system (MQS) for managing messages for the plurality of processors regarding the received information complying with different protocols. Each processor can process information complying with any of the different protocols.

Abstract: The present embodiments support both tunneling and offload functionality for tunneled packet having a tunnel header, the tunnel header encapsulating a packet, the packet having a packet header and a payload. When a tunneled packet is received at a network device, an offset value for the packet header is determined by comparing the tunnel header to a plurality of entries stored at a data structure maintained by the network device. The offset value is used for pre-processing the packet, and an offload module of the network device performs an offload function.

Abstract: Method and System for processing network information is provided. The system includes a computing system having a processor for executing instructions for an application module that generates an input/output (“I/O”) request for transmitting and receiving network information to and from the network device; a storage driver for receiving the I/O request from the application module; a network protocol stack for executing a network protocol layer for processing network related information; and an accelerator module that interfaces with the storage driver and the network protocol stack for accelerating processing of Internet Small Computer System Interface (iSCSI) protocol data units (PDUs).

Abstract: Method and system for processing TCP segments is provided. The method includes assigning a TCP connection to a queue; and assigning a maximum burst size for the TCP connection; wherein a queue establishes a priority for the TCP connection and the priority is based on a maximum transmission rate assigned to the queue. The system includes a host system that establishes a network connection via a network adapter; wherein a host application sets a byte count and a time interval value for at least two queues that have different priority to transmit TCP segments; assigns a TCP connection to a queue; and assigns a maximum burst size for the TCP connection.

Abstract: A system with a host bus adapter (“HBA”) having a TCP/IP offload engine is provided. The HBA includes logic for concurrently processing markers, data integrity fields (“DIFs”) and digests by using plural counters that count words in a data stream and individual routing bits are set for markers, DIFs and digests based on the plural counter values. When a counter reaches a certain threshold value, then locator bits are set for a field and the locator bits are forwarded with the data stream. A marker counter is incremented when each word in a data stream passes by the marker counter and markers can be inserted at a programmed interval. For DIF calculation an offset of a first byte in a DMA transfer and partial cyclic redundancy code value is seeded into a DIF location counter, which is incremented for each byte of data that passes by the DIF location counter.

Abstract: Method and system for performing hardware tasks using a hardware state machine and a processor is provided. The method includes, setting a breakpoint for a state machine state; running the processor in a parallel mode with the state machine; passing control to the processor after a breakpoint condition is encountered; performing a task, wherein the processor performs the task which was meant to be performed by the state machine; and transferring control back to the state machine after the processor performs the task. The system includes an Application Specific Integrated Circuit (ASIC) with the state machine, and the processor.

Abstract: Method and system for performing hardware tasks using a hardware state machine and a processor is provided. The method includes, setting a breakpoint for a state machine state; running the processor in a parallel mode with the state machine; passing control to the processor after a breakpoint condition is encountered; performing a task, wherein the processor performs the task which was meant to be performed by the state machine; and transferring control back to the state machine after the processor performs the task. The system includes an Application Specific Integrated Circuit (ASIC) with the state machine, and the processor.

Abstract: A system with a host bus adapter (“HBA”) having a TCP/IP offload engine is provided. The HBA includes logic for concurrently processing markers, data integrity fields (“DIFs”) and digests by using plural counters that count words in a data stream and individual routing bits are set for markers, DIFs and digests based on the plural counter values. When a counter reaches a certain threshold value, then locator bits are set for a field and the locator bits are forwarded with the data stream. A marker counter is incremented when each word in a data stream passes by the marker counter and markers can be inserted at a programmed interval. For DIF calculation an offset of a first byte in a DMA transfer and partial cyclic redundancy code value is seeded into a DIF location counter, which is incremented for each byte of data that passes by the DIF location counter.