Abstract: A structure and method of forming an integrated circuit (e.g., field effect transistor) having a buried Mott-insulated oxide channel includes depositing source and drain electrodes over a substrate forming a Mott transition channel layer over the substrate and electrodes, forming an insulator layer over the Mott transition channel layer, forming source and drain contacts through the insulator layer (such that the source and drain contacts are electrically connected to the Mott transition channel layer) and forming a gate electrode over the insulator layer between the source and drain contacts.

Abstract: A method of manufacturing an integrated circuit device includes forming a laminated structure having a first side and a second side, the first side includes a first type Mott channel layer and the second side includes a second type Mott channel layer. A first source region and a first drain region is formed on the first side, a second source region and a second drain region is formed on the second side, a first gate region is formed on the second side, opposite the first source region and the first drain region and a second gate region is formed on the first side, opposite the second source region and the second drain region. The first source, the first drain and the first gate comprise a first type field effect transistor and the second source, the second drain and the second gate comprise a second type field effect transistor.

Abstract: A method of manufacturing an integrated circuit device includes forming a laminated structure having a first side and a second side, the first side includes a first type Mott channel layer and the second side includes a second type Mott channel layer. A first source region and a first drain region is formed on the first side, a second source region and a second drain region is formed on the second side, a first gate region is formed on the second side, opposite the first source region and the first drain region and a second gate region is formed on the first side, opposite the second source region and the second drain region. The first source, the first drain and the first gate comprise a first type field effect transistor and the second source, the second drain and the second gate comprise a second type field effect transistor.

Abstract: A structure and method of forming an integrated circuit (e.g., field effect transistor) having a buried Mott-insulated oxide channel includes depositing source and drain electrodes over a substrate forming a Mott transition channel layer over the substrate and electrodes, forming an insulator layer over the Mott transition channel layer, forming source and drain contacts through the insulator layer (such that the source and drain contacts are electrically connected to the Mott transition channel layer) and forming a gate electrode over the insulator layer between the source and drain contacts.

Abstract: A structure and method of forming an integrated circuit (e.g., field effect transistor) having a buried Mott-insulated oxide channel includes depositing source and drain electrodes over a substrate forming a Mott transition channel layer over the substrate and electrodes, forming an insulator layer over the Mott transition channel layer, forming source and drain contacts through the insulator layer (such that the source and drain contacts are electrically connected to the Mott transition channel layer) and forming a gate electrode over the insulator layer between the source and drain contacts.

Abstract: A method is described for fabricating electroluminescent devices exhibiting visible electroluminescence at room temperature, where the devices include at least one doped layer of amorphous hydrogenated silicon (a-Si:H). The a-Si:H layer is deposited on a substrate by homogeneous chemical vapor deposition (H-CVD) in which the substrate is held at a temperature lower than about 200.degree. C. and the a-Si:H layer is doped in-situ during deposition, the amount of hydrogen incorporated in the deposited layer being 12-50 atomic percent. The bandgap of the a-Si:H layer is between 1.6 and 2.6 eV, and in preferrable embodiments is between 2.0 and 2.6 eV. The conductivity of the a-Si:H layer is chosen in accordance with device requirements, and can be 10.sup.16 -10.sup.19 carriers/cm.sup.2. The bandgap of the a-Si:H layer depends at least in part on the temperature of the substrate on which the layer is deposited, and can be "tuned" by changing the substrate temperature.

Abstract: A process for preparing tungsten silicide films using low pressure, low temperature chemical vapor deposition to deposit silicon-rich tungsten silicide films. As a source of silicon, higher order silanes, such as disilane and trisilane, are used. The gaseous tungsten source is WF.sub.6. The substrate temperature range is less than about 370.degree. C., while the total pressure range is in the range 0.05-1 Torr. WF.sub.6 flow rates are generally less than 25 sccm, while the higher order silane flow rates are generally less than about 400 sccm.

Abstract: A technique and apparatus for homogeneous chemical vapor deposition (HCVD), wherein a heated carrier gas is mixed with a source gas in a location close to a substrate on which deposition is to occur. The heated carrier gas transfers heat to the source gas in order to decompose it, producing the intermediate species necessary for deposition onto the substrate. Thus, the source gas is not subjected to heating above its pyrolysis temperature prior to being transported to the immediate vicinity of the substrate. This HCVD apparatus includes a heat source for heating the carrier gas, a tube for bringing the heated carrier gas to a location close to the substrate, and another tube for bringing the reactive source gas to the aforementioned location where it is mixed with the hot carrier gas to cause decomposition of the source gas close to the substrate. The substrate temperature is decoupled from the hot gas temperature and is significantly colder than the hot gas temperature.

Abstract: Disilane (Si.sub.2 H.sub.6), trisilane (Si.sub.3 H.sub.8) or a higher order silane is applied in a glow discharge process to rapidly and efficiently form a film of hydrogenated amorphous silicon on a substrate. An inductively coupled RF glow discharge apparatus, a capacitively coupled glow discharge apparatus or a DC glow discharge apparatus may be employed to deposit the amorphous silicon on a conducting or non-conducting substrate. The disilane or higher order silanes may also be combined in a glow discharge process with gases which contain elements such as nitrogen or oxygen to rapidly deposit corresponding compound films.

Abstract: The invention relates to high resolution video storage disks comprising a substrate having disposed thereon a film of a monofunctionalized substituted tetraheterofulvalene compound and a halocarbon. The tetraheterofulvalene compound can have the molecular formula ##STR1## where X can be S and/or Se R can be an alkyl group having from about 1 to about 8 carbon atoms or a benzyl group wherein said benzyl group can be a part of a polymer chain;and Y can be either an ester or an ether.