Abstract: A system has a collection of central processing units. Each central processing unit is connected to at least one other central processing unit and has a path into flash memory resources. A central processing unit supports a mapping from a data address space, to a flash memory virtual address space, to a flash memory virtual page number to a flash memory physical address space.

Abstract: A system has a collection of central processing units. Each central processing unit is connected to at least one other central processing unit and has a path into flash memory resources. A central processing unit supports a mapping from a data address space, to a flash memory virtual address space, to a flash memory virtual page number to a flash memory physical address space.

Abstract: A system has a collection of central processing units. Each central processing unit is connected to at least one other central processing unit and has a path into flash memory resources. A central processing unit supports a mapping from a data address space, to a flash memory virtual address space, to a flash memory virtual page number to a flash memory physical address space.

Abstract: A hardware trie structure includes a tree of internal node circuits and leaf node circuits. Each internal node is configured by a corresponding multi-bit node control value (NCV). Each leaf node can output a corresponding result value (RV). An input value (IV) supplied onto input leads of the trie causes signals to propagate through the trie such that one of the leaf nodes outputs one of the RVs onto output leads of the trie. In a transactional memory, a memory stores a set of NCVs and RVs. In response to a lookup command, the NCVs and RVs are read out of memory and are used to configure the trie. The IV of the lookup is supplied to the input leads, and the trie looks up an RV. A non-final RV initiates another lookup in a recursive fashion, whereas a final RV is returned as the result of the lookup command.

Abstract: A system and method for locally determining a fair allocated bandwidth for a network node configured to send and receive packets in an upstream direction and a downstream direction is disclosed. A local allocated bandwidth is allocated for locally generated network packets sent in the downstream direction. A minimum downstream available network bandwidth is determined from information received in the upstream direction. The local allocated bandwidth is adjusted based on the minimum downstream available network bandwidth and the local allocated bandwidth is used to govern whether a class of locally generated network packets are sent in the downstream direction.

Abstract: The invention provides a method and system for routing information lookup for packets using a routing protocol such as IP. Routing information which has been determined responsive to the packet header, which includes a destination address, a source address, and an input interface for the packet. Routing lookup is performed in response to at least one set of selected routing information, using a lookup table which includes tags both for the routing information and for a bitmask length (thus indicating the generality or scope of the routing information for the routing lookup). The lookup table is structured so that addresses having the most common bitmask length are addressed first, but that more specific addresses are still considered when they are present. It has been discovered that most internet addresses can be found by reference to 24-bit or 21-bit IP addresses, after which 16-bit, 12-bit, and finally 32-bit IP addresses are considered.

Abstract: The invention provides a system and method for sharing packet traffic load among a plurality of possible paths. Each packet is associated with a flow, and a hash value is determined for each flow, so as to distribute the sequence of packets into a set of hash buckets. The hash value has a relatively large number of bits, but is divided by the number of possible paths so as to achieve a relatively small modulus value; the modulus value is used to index into a relatively small table associating one selected path with each entry. The modulus value is determined by a relatively small amount of circuitry, simultaneously for a plurality of moduli, and one such modulus value is selected in response to the number of possible paths.

Abstract: The invention provides a method and system for identifying header information in a packet header, and for switching (and otherwise operating) on the packet in response thereto. A first set of header information recognizers operate in parallel on selected words of the packet header so as to recognize a header format for the packet header and to determine header information in response to that header format. A second set of header information recognizers operates on the header information to select a set of words from the packet header which are used for lookup for treatment of the packet. The same or similar header information is located in the packet header responsive to information which determines an encapsulation type for the packet, such as packets which use the IP version 4, IP version 6, or IPX protocols.

Abstract: The invention provides a method and system for routing information lookup for packets using routing protocols such as IP or IP multicast (IGMP), or MPLS (multiprotocol label switching, also known as tag switching or label switching) or MPLS multicast, in which both the destination address and the length of that destination address are matched using a lookup table having separate entries for selected addresses and their lengths, which can be accessed in parallel for multiple representations of destination addresses, and in which the input interface associated with the packet is included in the information used for matching.

Abstract: A system and method for locally determining a fair allocated bandwidth for a network node configured to send and receive packets in an upstream direction and a downstream direction is disclosed. A local allocated bandwidth is allocated for locally generated network packets sent in the downstream direction. A minimum downstream available network bandwidth is determined from information received in the upstream direction. The local allocated bandwidth is adjusted based on the minimum downstream available network bandwidth and the local allocated bandwidth is used to govern whether a class of locally generated network packets are sent in the downstream direction.

Abstract: A system and method for locally determining a fair allocated bandwidth for a network node configured to send and receive packets in an upstream direction and a downstream direction is disclosed. A local allocated bandwidth is allocated for locally generated network packets sent in the downstream direction. A minimum downstream available network bandwidth is determined from information received in the upstream direction. The local allocated bandwidth is adjusted based on the minimum downstream available network bandwidth and the local allocated bandwidth is used to govern whether a class of locally generated network packets are sent in the downstream direction.

Abstract: The invention provides a method and system for routing information lookup for packets using routing protocols such as IP or IP multicast (IGMP), or MPLS (multiprotocol label switching, also known as tag switching or label switching) or MPLS multicast, in which both the destination address and the length of that destination address are matched using a lookup table having separate entries for selected addresses and their lengths, which can be accessed in parallel for multiple representations of destination addresses, and in which the input interface associated with the packet is included in the information used for matching.

Abstract: The invention provides a method and system for routing information lookup for packets using a routing protocol such as IP. Routing information which has been determined responsive to the packet header, which includes a destination address, a source address, and an input interface for the packet. Routing lookup is performed in response to at least one set of selected routing information, using a lookup table which includes tags both for the routing information and for a bitmask length (thus indicating the generality or scope of the routing information for the routing lookup). The lookup table is structured so that addresses having the most common bitmask length are addressed first, but that more specific addresses are still considered when they are present. It has been discovered that most internet addresses can be found by reference to 24-bit or 21-bit IP addresses, after which 16-bit, 12-bit, and finally 32-bit IP addresses are considered.

Abstract: The invention provides a method and system for identifying header information in a packet header, and for switching (and otherwise operating) on the packet in response thereto. A first set of header information recognizers operate in parallel on selected words of the packet header so as to recognize a header format for the packet header and to determine header information in response to that header format. A second set of header information recognizers operates on the header information to select a set of words from the packet header which are used for lookup for treatment of the packet. The same or similar header information is located in the packet header responsive to information which determines an encapsulation type for the packet, such as packets which use the IP version 4, IP version 6, or IPX protocols.

Abstract: The invention provides a system and system for sharing packet traffic load among a plurality of possible paths. Each packet is associated with a flow, and a hash value is determined for each flow, so as to distribute the sequence of packets into a set of hash buckets. The hash value has a relatively large number of bits, but is divided by the number of possible paths so as to achieve a relatively small modulus value; the modulus value is used to index into a relatively small table associating one selected path with each entry. The modulus value is determined by a relatively small amount of circuitry, simultaneously for a plurality of moduli, and one such modulus value is selected in response to the number of possible paths.

Abstract: A device for switching packets at high speed. For each packet, the A device matches packet data with protocols, to determine how to switch the packet. Matching of data with protocols is highly parallel; the device simultaneously retrieves a data byte, compares a data byte with a protocol byte, tests a comparison result, and executes a processor instruction. A switching engine having a comparator and a decision tree memory. The comparator includes three outputs for indicating a comparison result (less-than, equal-to, or greater-than). The tree memory includes three corresponding banks of addressable memory. Each memory location comprises an entry for a next location, an entry for a next protocol byte, and an entry for a processor instruction. A set of protocol tests are assembled into the tree memory, and a set of routing tables are dynamically generated into the tree memory.