Abstract: A method of effectuating access security includes sending authentication data with a specific lifetime from a mobile device to an information handling system. The information handling system includes a controller and a housing. The housing includes a chassis and a latch component, with the controller electrically coupled to the latch component. The method includes determining by the controller in accordance with the authentication data whether the mobile device is authorized to activate the latch component and activating the latch component by the controller to lock or unlock the housing in response to a determination that the mobile device is authorized to activate the latch component.

Abstract: A method of effectuating access security includes sending authentication data with a specific lifetime from a mobile device to an information handling system. The information handling system includes a controller and a housing. The housing includes a chassis and a latch component, with the controller electrically coupled to the latch component. The method includes determining by the controller in accordance with the authentication data whether the mobile device is authorized to activate the latch component and activating the latch component by the controller to lock or unlock the housing in response to a determination that the mobile device is authorized to activate the latch component.

Abstract: A combination of data processing systems that are connected to a common peripheral bus, such as a PCI bus. The processor(s) of each system or blade may communicate with the peripheral bus through an intermediate bus controller. The bus controller may include facilities, such as registers that define a starting address, suitable for defining a window in the blade's system memory that is available or visible to other processors (or masters) on the bus. One or more of the bus controllers may be configured to read information that uniquely identifies each system or blade. The bus controller may use this identification information to define the window in the blade's system memory that is visible to other processors. In an embodiment where each blade is connected to a PCI bus through a CompactPCI® connector, the identification information may be read from the geographic address (GA) pins on the system's J2 connector.

Abstract: A combination of data processing systems that are connected to a common peripheral bus, such as a PCI bus. The processor(s) of each system or blade may communicate with the peripheral bus through an intermediate bus controller. The bus controller may include facilities, such as registers that define a starting address, suitable for defining a window in the blade's system memory that is available or visible to other processors (or masters) on the bus. One or more of the bus controllers may be configured to read information that uniquely identifies each system or blade. The bus controller may use this identification information to define the window in the blade's system memory that is visible to other processors. In an embodiment where each blade is connected to a PCI bus through a CompactPCI® connector, the identification information may be read from the geographic address (GA) pins on the system's J2 connector.

Abstract: Alternate focal bus mastering and expansion bus capability are provided for a Family I computer system where an alternate bus master and expansion or input/output bus are connectable to the computer system through a readily insertable and removable device card connected directly to the processor and memory of the computer system through a series of one or more pluggable interconnecting cards for matingly engaging a computer system planar board connector.