Patents by Inventor Bruce Block

Bruce Block has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040061197
    Abstract: A method of fabricating a decoupling capacitor includes depositing a first barrier metal on a conducting metal. The first barrier metal acts as a first electrode of the decoupling capacitor. A dielectric is deposited on the first barrier metal. A second barrier metal is deposited on the dielectric. The second barrier metal acts as a second electrode of the decoupling capacitor. A photoresist is exposed to ultraviolet light. The photoresist is applied on the second barrier metal. A mask is utilized to define an approximate shape of the decoupling capacitor. A portion of the second barrier metal is etched. A quantity of the photoresist is removed.
    Type: Application
    Filed: September 30, 2002
    Publication date: April 1, 2004
    Applicant: Intel Corporation
    Inventors: Bruce Block, Christopher Thomas
  • Patent number: 6706584
    Abstract: A method of fabricating an on-chip decoupling capacitor which helps prevent L di/dt voltage droop on the power grid for high surge current conditions is disclosed. Inclusion of the decoupling capacitor on die directly between the power grid greatly reduces the inductance L, and provides decoupling to reduce the highest possible frequency noise. This invention specifically describes the process flow in which the decoupling capacitor is located between the top layer metallization and the standard bump contacts which have either multiple openings or bar geometries to provide both power grid and top decoupling capacitor electrode contacts.
    Type: Grant
    Filed: June 29, 2001
    Date of Patent: March 16, 2004
    Assignee: Intel Corporation
    Inventors: Richard Scott List, Bruce A. Block, Mark T. Bohr
  • Publication number: 20040002187
    Abstract: An apparatus including a capacitor formed between metallization layers on a circuit, the capacitor including a bottom electrode coupled to a metal layer and a top electrode coupled to a metal via wherein the capacitor has a corrugated sidewall profile. A method including forming an interlayer dielectric including alternating layers of dissimilar dielectric materials in a multilayer stack over a metal layer of a device structure; forming a via having a corrugated sidewall; and forming a decoupling capacitor stack in the via that conforms to the sidewall of the via.
    Type: Application
    Filed: June 27, 2002
    Publication date: January 1, 2004
    Inventors: Bruce A. Block, Richard Scott List
  • Publication number: 20030161571
    Abstract: A waveguide including a waveguide core having a top surface that defines an angle. A waveguide can include a waveguide core offset from a substrate by a cladding layer. A phototransistor includes an emitter, a collector, and a base in lateral alignment. A photodiode includes n- and p-type regions and an intrinsic substrate portion in lateral alignment. A waveguide includes a waveguide core, an attenuating layer, and a detector layer. A method for fabricating a device includes forming a cladding layer over a substrate having a detector layer formed thereon; forming an opening in the cladding layer to expose the detector layer; forming a waveguide layer over the cladding layer and the opening; removing a portion of the waveguide layer to define a waveguide core; and implanting first and second regions into the detector layer proximate the waveguide core.
    Type: Application
    Filed: February 26, 2002
    Publication date: August 28, 2003
    Inventors: Paul Davids, Bruce A. Block, Miriam R. Reshotko
  • Publication number: 20030060052
    Abstract: A three dimensional capacitor fabricated as part of a dual damascene process is disclosed. The capacitor structure comprises two barrier metal layers separated by a high k dielectric and is formed in all the via and trench openings. The upper barrier layer and dielectric is selectively removed from those openings which will have ordinary vias and conductors, the other opening remains as capaitor.
    Type: Application
    Filed: September 27, 2001
    Publication date: March 27, 2003
    Inventors: Sarah E. Kim, R. Scott List, Bruce A. Block
  • Publication number: 20030057471
    Abstract: An improvement in the method of fabricating on chip decoupling capacitors which help prevent L di/dt voltage droop on the power grid for high surge current conditions is disclosed. The inclusion of a hybrid metal/metal nitride top electrode/barrier provides for a low cost and higher performance option to strapping decoupling capacitors.
    Type: Application
    Filed: September 24, 2001
    Publication date: March 27, 2003
    Inventors: Richard Scott List, Bruce A. Block, Ruitao Zhang
  • Publication number: 20030001284
    Abstract: A method of fabricating an on-chip decoupling capacitor which helps prevent L di/dt voltage droop on the power grid for high surge current conditions is disclosed. Inclusion of the decoupling capacitor on die directly between the power grid greatly reduces the inductance L, and provides decoupling to reduce the highest possible frequency noise.
    Type: Application
    Filed: June 29, 2001
    Publication date: January 2, 2003
    Inventors: Richard Scott List, Bruce A. Block, Mark T. Bohr
  • Patent number: 6303393
    Abstract: Optical waveguides exhibiting non-linear and/or electro-optic properties comprise a rare earth doped barium titanate thin film as an optical working medium. The thin film is metalorganic chemical vapor deposited on a substrate in a reactor to incorporate rare earth atoms in-situ in the barium titanate or other ferroelectric oxide host material.
    Type: Grant
    Filed: June 19, 2000
    Date of Patent: October 16, 2001
    Assignee: Northwestern University
    Inventors: Bruce W. Wessels, Bruce A. Block
  • Patent number: 6122429
    Abstract: Optical waveguides exhibiting non-linear and/or electro-optic properties comprise a rare earth doped barium titanate thin film as an optical working medium. The thin film is metalorganic chemical vapor deposited on a substrate in a reactor to incorporate rare earth atoms in-situ in the barium titanate or other ferroelectric oxide host material.
    Type: Grant
    Filed: March 2, 1995
    Date of Patent: September 19, 2000
    Assignee: Northwestern University
    Inventors: Bruce W. Wessels, Bruce A. Block
  • Patent number: 5663556
    Abstract: An optoelectronic temperature sensor comprises a doped ferroelectric oxide thin film that exhibits a detectable change in luminescence intensity with temperature as a result of an oxide phase transition when the sensor is heated or cooled through a particular temperature range. The phase of the doped ferroelectric oxide affects the intensity of the luminescence emitted by the doped ferroelectric oxide and thereby provides a temperature dependent parameter or output. The optoelectronic temperature sensor of the present invention can comprise a rare earth or transition metal doped ferroelectric oxide thin film.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: September 2, 1997
    Assignee: Northwestern University
    Inventors: Bruce W. Wessels, Bruce A. Block