Patents by Inventor Bruce C. Giamei
Bruce C. Giamei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11366759Abstract: Processing of a storage operand request identified as restrained is selectively, temporarily suppressed. The processing includes identifying a storage operand request as restrained, where the identifying includes obtaining, by a processing unit, an access intent instruction indicating an access intent associated with an operand of a next sequential instruction. The access intent indicates usage of the storage operand request is restrained. Further, the method includes determining whether a storage operand request is to a common storage location shared by multiple processing units of a computing environment and is identified restrained, and based on determining that the storage operand request is restrained, then temporarily suppressing requesting access to the common storage location pursuant to the storage operand request.Type: GrantFiled: December 10, 2020Date of Patent: June 21, 2022Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Bruce C. Giamei, Christian Jacobi, Daniel V. Rosa, Anthony Saporito, Donald W. Schmidt, Chung-Lung K. Shum
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Patent number: 11314555Abstract: A processor requests that a data transformation operation be performed using another processor, in which the data transformation operation is performed asynchronously. A determination is made that the data transformation operation performed using the other processor has completed unsatisfactorily, and based on the unsatisfactory completion, status relating to performance of the data transformation operation is incomplete. The data transformation operation is then re-executed synchronously using the one processor, and the re-executing provides status information unavailable in performing the data transformation operation asynchronously.Type: GrantFiled: August 26, 2019Date of Patent: April 26, 2022Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Matthias Klein, Timothy Siegel, Anthony T. Sofia, Simon Weishaupt, Bruce C. Giamei, Louis P. Gomes, Mahmoud Amin
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Patent number: 11281469Abstract: Saving and restoring machine state between multiple executions of an instruction. A determination is made that processing of an operation of an instruction executing on a processor has been interrupted prior to completion. Based on determining that the processing of the operation has been interrupted, current metadata of the processor is extracted. The metadata is stored in a location associated with the instruction and used to re-execute the instruction to resume forward processing of the instruction from where it was interrupted.Type: GrantFiled: December 15, 2020Date of Patent: March 22, 2022Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Bruce C. Giamei, Martin Recktenwald, Donald W. Schmidt, Timothy Slegel, Aditya N. Puranik, Mark S. Farrell, Christian Jacobi, Jonathan D. Bradbury, Christian Zoellin
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Patent number: 11221850Abstract: A Sort Lists instruction is provided to perform a sort and/or a merge operation. The instruction is an architected machine instruction of an instruction set architecture and is executed by a general-purpose processor of the computing environment. The executing includes sorting a plurality of input lists to obtain one or more sorted output lists, which are output.Type: GrantFiled: September 30, 2020Date of Patent: January 11, 2022Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Bruce C. Giamei, Martin Recktenwald, Donald W. Schmidt, Timothy Siegel, Aditya N. Puranik, Mark S. Farrell, Christian Jacobi, Jonathan D. Bradbury, Christian Zoellin
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Patent number: 11209992Abstract: Detection of alteration of storage keys used to protect memory includes determining whether a storage key alteration event has occurred within a processor of a computing environment. The determining includes checking whether one or more selected fields of a storage key have been updated. The storage key is associated with a block of memory and controls access to the block of memory. Based on the checking indicating that the one or more selected fields of the storage key have been updated, a storage key alteration event has been detected. Based on determining the storage key alteration event has occurred, a notification is provided.Type: GrantFiled: September 25, 2020Date of Patent: December 28, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Timothy Slegel, Jonathan D. Bradbury, Bruce C. Giamei, James H. Mulder, Peter J. Relson
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Patent number: 11175923Abstract: A computer-implemented method for marking load and store instruction overlap in a processor pipeline is described. The method includes detecting a load instruction following a store instruction in an instruction stream. The load instruction and the store instruction include instruction text. The instruction text includes operand address information. The method includes comparing operand address information of the store instruction with operand address information of the load instruction to determine whether there is a memory image overlap in an issue queue between the operand address information of the store instruction and the load instruction. The method also includes delaying the load instruction in the processor pipeline in response to determining that there is a memory image overlap.Type: GrantFiled: February 13, 2017Date of Patent: November 16, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Gregory W. Alexander, James J. Bonanno, Adam B. Collura, Bruce C. Giamei, Christian Jacobi, Jang-Soo Lee, Edward T. Malley, Lawrence J. Powell, Jr., Anthony Saporito
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Publication number: 20210096998Abstract: Processing of a storage operand request identified as restrained is selectively, temporarily suppressed. The processing includes identifying a storage operand request as restrained, where the identifying includes obtaining, by a processing unit, an access intent instruction indicating an access intent associated with an operand of a next sequential instruction. The access intent indicates usage of the storage operand request is restrained. Further, the method includes determining whether a storage operand request is to a common storage location shared by multiple processing units of a computing environment and is identified restrained, and based on determining that the storage operand request is restrained, then temporarily suppressing requesting access to the common storage location pursuant to the storage operand request.Type: ApplicationFiled: December 10, 2020Publication date: April 1, 2021Inventors: Bruce C. GIAMEI, Christian JACOBI, Daniel V. ROSA, Anthony SAPORITO, Donald W. SCHMIDT, Chung-Lung K. SHUM
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Publication number: 20210096876Abstract: Saving and restoring machine state between multiple executions of an instruction. A determination is made that processing of an operation of an instruction executing on a processor has been interrupted prior to completion. Based on determining that the processing of the operation has been interrupted, current metadata of the processor is extracted. The metadata is stored in a location associated with the instruction and used to re-execute the instruction to resume forward processing of the instruction from where it was interrupted.Type: ApplicationFiled: December 15, 2020Publication date: April 1, 2021Inventors: Bruce C. Giamei, Martin Recktenwald, Donald W. Schmidt, Timothy Slegel, Aditya N. Puranik, Mark S. Farrell, Christian Jacobi, Jonathan D. Bradbury, Christian Zoellin
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Patent number: 10956337Abstract: Processing of a storage operand request identified as restrained is selectively, temporarily suppressed. The processing includes determining whether a storage operand request to a common storage location shared by multiple processing units of a computing environment is restrained, and based on determining that the storage operand request is restrained, then temporarily suppressing requesting access to the common storage location pursuant to the storage operand request. The processing unit performing the processing may proceed with processing of the restrained storage operand request, without performing the suppressing, where the processing can be accomplished using cache private to the processing unit. Otherwise the suppressing may continue until an instruction, or operation of an instruction, associated with the storage operand request is next to complete.Type: GrantFiled: September 5, 2019Date of Patent: March 23, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Bruce C. Giamei, Christian Jacobi, Daniel V. Rosa, Anthony Saporito, Donald W. Schmidt, Chung-Lung K. Shum
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Patent number: 10949212Abstract: Saving and restoring machine state between multiple executions of an instruction. A determination is made that processing of an operation of an instruction executing on a processor has been interrupted prior to completion. Based on determining that the processing of the operation has been interrupted, current metadata of the processor is extracted. The metadata is stored in a location associated with the instruction and used to re-execute the instruction to resume forward processing of the instruction from where it was interrupted.Type: GrantFiled: July 20, 2020Date of Patent: March 16, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Bruce C. Giamei, Martin Recktenwald, Donald W. Schmidt, Timothy Siegel, Aditya N. Puranik, Mark S. Farrell, Christian Jacobi, Jonathan D. Bradbury, Christian Zoellin
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Publication number: 20210064440Abstract: A processor requests that a data transformation operation be performed using another processor, in which the data transformation operation is performed asynchronously. A determination is made that the data transformation operation performed using the other processor has completed unsatisfactorily, and based on the unsatisfactory completion, status relating to performance of the data transformation operation is incomplete. The data transformation operation is then re-executed synchronously using the one processor, and the re-executing provides status information unavailable in performing the data transformation operation asynchronously.Type: ApplicationFiled: August 26, 2019Publication date: March 4, 2021Inventors: Matthias Klein, Timothy Slegel, Anthony T. Sofia, Simon Weishaupt, Bruce C. Giamei, Louis P. Gomes, Mahmoud Amin
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Publication number: 20210011719Abstract: A Sort Lists instruction is provided to perform a sort and/or a merge operation. The instruction is an architected machine instruction of an instruction set architecture and is executed by a general-purpose processor of the computing environment. The executing includes sorting a plurality of input lists to obtain one or more sorted output lists, which are output.Type: ApplicationFiled: September 30, 2020Publication date: January 14, 2021Inventors: Bruce C. Giamei, Martin Recktenwald, Donald W. Schmidt, Timothy Slegel, Aditya N. Puranik, Mark S. Farrell, Christian Jacobi, Jonathan D. Bradbury, Christian Zoellin
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Publication number: 20210011635Abstract: Detection of alteration of storage keys used to protect memory includes determining whether a storage key alteration event has occurred within a processor of a computing environment. The determining includes checking whether one or more selected fields of a storage key have been updated. The storage key is associated with a block of memory and controls access to the block of memory. Based on the checking indicating that the one or more selected fields of the storage key have been updated, a storage key alteration event has been detected. Based on determining the storage key alteration event has occurred, a notification is provided.Type: ApplicationFiled: September 25, 2020Publication date: January 14, 2021Inventors: Timothy Slegel, Jonathan D. Bradbury, Bruce C. Giamei, James H. Mulder, Peter J. Relson
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Patent number: 10838631Abstract: Detection of alteration of storage keys used to protect memory includes determining whether a storage key alteration event has occurred within a processor of a computing environment. The determining includes checking whether one or more selected fields of a storage key have been updated. The storage key is associated with a block of memory and controls access to the block of memory. Based on the checking indicating that the one or more selected fields of the storage key have been updated, a storage key alteration event has been detected. Based on determining the storage key alteration event has occurred, a notification is provided.Type: GrantFiled: February 25, 2019Date of Patent: November 17, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Timothy Slegel, Jonathan D. Bradbury, Bruce C. Giamei, James H. Mulder, Peter J. Relson
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Patent number: 10831478Abstract: A Sort Lists instruction is provided to perform a sort and/or a merge operation. The instruction is an architected machine instruction of an instruction set architecture and is executed by a general-purpose processor of the computing environment. The executing includes sorting a plurality of input lists to obtain one or more sorted output lists, which are output.Type: GrantFiled: November 6, 2018Date of Patent: November 10, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Bruce C. Giamei, Martin Recktenwald, Donald W. Schmidt, Timothy Slegel, Aditya N. Puranik, Mark S. Farrell, Christian Jacobi, Jonathan D. Bradbury, Christian Zoellin
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Patent number: 10831503Abstract: Saving and restoring machine state between multiple executions of an instruction. A determination is made that processing of an operation of an instruction executing on a processor has been interrupted prior to completion. Based on determining that the processing of the operation has been interrupted, current metadata of the processor is extracted. The metadata is stored in a location associated with the instruction and used to re-execute the instruction to resume forward processing of the instruction from where it was interrupted.Type: GrantFiled: November 6, 2018Date of Patent: November 10, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Bruce C. Giamei, Martin Recktenwald, Donald W. Schmidt, Timothy Slegel, Aditya N. Puranik, Mark S. Farrell, Christian Jacobi, Jonathan D. Bradbury, Christian Zoellin
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Patent number: 10831502Abstract: Migration of partially completed instructions. A determination is made that processing of an operation of an instruction executing on a processor has been interrupted prior to completion. The instruction is re-executed on a selected processor to resume forward processing of the instruction. The re-executing includes determining whether model-dependent metadata is to be used by the selected processor in re-executing the instruction. Based on determining the model-dependent metadata is to be used, the model-dependent metadata is used in re-executing the instruction. Based on determining the model-dependent metadata is not to be used, proceeding with re-executing the instruction without using the model-dependent metadata.Type: GrantFiled: November 6, 2018Date of Patent: November 10, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Bruce C. Giamei, Martin Recktenwald, Donald W. Schmidt, Timothy Slegel, Aditya N. Puranik, Mark S. Farrell, Christian Jacobi, Jonathan D. Bradbury, Christian Zoellin
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Patent number: 10831497Abstract: An instruction to perform a function of a plurality of functions is obtained. The instruction is a single architected instruction of an instruction set architecture that complies to an industry standard for compression. The instruction is executed, and the executing includes performing the function specified by the instruction. The performing includes, based on the function being a compression function or a decompression function, transforming state of input data between an uncompressed form of the input data and a compressed form of the input data to provide a transformed state of data accessing. During performing the function, history relating to the function is accessed. The history is to be used in transforming the state of input data between the uncompressed form and the compressed form.Type: GrantFiled: January 31, 2019Date of Patent: November 10, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Bruce C. Giamei, Anthony T. Sofia, Matthias Klein, Simon Weishaupt, Mark S. Farrell, Timothy Slegel, Ashutosh Mishra, Christian Jacobi
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Publication number: 20200348940Abstract: Saving and restoring machine state between multiple executions of an instruction. A determination is made that processing of an operation of an instruction executing on a processor has been interrupted prior to completion. Based on determining that the processing of the operation has been interrupted, current metadata of the processor is extracted. The metadata is stored in a location associated with the instruction and used to re-execute the instruction to resume forward processing of the instruction from where it was interrupted.Type: ApplicationFiled: July 20, 2020Publication date: November 5, 2020Inventors: Bruce C. Giamei, Martin Recktenwald, Donald W. Schmidt, Timothy Slegel, Aditya N. Puranik, Mark S. Farrell, Christian Jacobi, Jonathan D. Bradbury, Christian Zoellin
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Publication number: 20200272341Abstract: Detection of alteration of storage keys used to protect memory includes determining whether a storage key alteration event has occurred within a processor of a computing environment. The determining includes checking whether one or more selected fields of a storage key have been updated. The storage key is associated with a block of memory and controls access to the block of memory. Based on the checking indicating that the one or more selected fields of the storage key have been updated, a storage key alteration event has been detected. Based on determining the storage key alteration event has occurred, a notification is provided.Type: ApplicationFiled: February 25, 2019Publication date: August 27, 2020Inventors: Timothy Slegel, Jonathan D. Bradbury, Bruce C. Giamei, James H. Mulder, Peter J. Relson