Patents by Inventor Bruce Doyle

Bruce Doyle has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8947967
    Abstract: Embodiments are described for a method for regulating sleep mode of a plurality of sub-banks in an SRAM array by isolating all of the sub-banks from a regulator upon access to at least one sub-bank that causes the accessed sub-bank to go to an operating voltage, and isolating the accessed sub-bank from non accessed sub-banks, while maintaining a sleep voltage on a load memory array and each of the sub-banks through the regulator; comparing a voltage on the non accessed sub-banks to a voltage output of the regulator; and providing a sleep voltage level to all of the sub-banks through the regulator when the voltage on the non accessed sub-banks is less than the sleep voltage.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: February 3, 2015
    Assignee: Advanced Micro Devices Inc.
    Inventors: Michael Dreesen, Stephen Greenwood, Bruce Doyle
  • Patent number: 7498858
    Abstract: Embodiments of an interpolator system and method are disclosed. One embodiment of an interpolator system, among others, includes an interpolator having first and second output terminals providing output signals; a comparator coupled to the first and second output terminals and configured to detect a peak voltage level of the output signals and compare the peak voltage level with a reference voltage level; and an impedance element coupled to the comparator and the first and second output terminals, wherein the comparator is configured to provide a control signal to the impedance element to change the impedance of the impedance element to set a voltage variation of the output signals.
    Type: Grant
    Filed: November 1, 2004
    Date of Patent: March 3, 2009
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Jayen J. Desai, Bruce Doyle
  • Publication number: 20070229147
    Abstract: For one disclosed embodiment, a supply voltage regulator is to control voltage at a first supply node for a circuit. The supply voltage regulator includes one or more first devices to couple the first supply node to a second supply node when the circuit is in a predetermined operational state and includes an error sensor to control the one or more first devices. The supply voltage regulator includes one or more second devices to couple the first supply node to a third supply node when the circuit is in the predetermined operational state. Other embodiments are also disclosed.
    Type: Application
    Filed: March 30, 2006
    Publication date: October 4, 2007
    Inventors: Bruce Doyle, Manish Kumar, John Wuu, Samuel Naffziger
  • Publication number: 20060265174
    Abstract: A thermal sensing system may comprise a plurality of remote sensors distributed across an integrated circuit (IC). Each of the plurality of remote sensors provides an analog signal that varies as a function of temperature of a respective region of the IC where each respective remote sensor is located. A central system, forming part of the IC, samples the analog signals from the plurality of remote sensors and converts the sampled analog signals to corresponding digital values.
    Type: Application
    Filed: May 18, 2005
    Publication date: November 23, 2006
    Inventors: Bruce Doyle, Samuel Naffziger, Christopher Poirier, James Ignowski
  • Patent number: 7135892
    Abstract: Systems, methodologies, media and other embodiments associated with peak detectors are described. One exemplary system embodiment includes a voltage peak detector comprising a first detector logic configured to detect a peak voltage of an input signal. The first detector logic has a circuit behavior that produces a leakage current that may alter the peak voltage. The system can also include a second detector logic configured to replicate the circuit behavior of the first detector logic including being configured to produce a replica leakage current that is equivalent to the leakage current. The second detector logic can be operably connected to the first detector logic to cause the replica leakage current to negate the leakage current.
    Type: Grant
    Filed: June 29, 2004
    Date of Patent: November 14, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Bruce Doyle, Gregory L. Ranson
  • Publication number: 20060091925
    Abstract: Embodiments of an interpolator system and method are disclosed. One embodiment of an interpolator system, among others, includes an interpolator having first and second output terminals providing output signals; a comparator coupled to the first and second output terminals and configured to detect a peak voltage level of the output signals and compare the peak voltage level with a reference voltage level; and an impedance element coupled to the comparator and the first and second output terminals, wherein the comparator is configured to provide a control signal to the impedance element to change the impedance of the impedance element to set a voltage variation of the output signals.
    Type: Application
    Filed: November 1, 2004
    Publication date: May 4, 2006
    Inventors: Jayen Desai, Bruce Doyle
  • Publication number: 20050285634
    Abstract: Systems, methodologies, media and other embodiments associated with peak detectors are described. One exemplary system embodiment includes a voltage peak detector comprising a first detector logic configured to detect a peak voltage of an input signal. The first detector logic has a circuit behavior that produces a leakage current that may alter the peak voltage. The system can also include a second detector logic configured to replicate the circuit behavior of the first detector logic including being configured to produce a replica leakage current that is equivalent to the leakage current. The second detector logic can be operably connected to the first detector logic to cause the replica leakage current to negate the leakage current.
    Type: Application
    Filed: June 29, 2004
    Publication date: December 29, 2005
    Inventors: Bruce Doyle, Gregory Ranson
  • Patent number: 5546026
    Abstract: A sense amplifier circuit includes a voltage developing stage which receives first and second data inputs, din1 and din2, and generates a differential voltage, in response to feedback signals received from a first and second data outputs, dout1 and dour2, of the sense amplifier circuit, which is indicative of a voltage difference between the first and second data inputs, din1 and din2; a full-swing locking stage which generates and latches, in response to a control signal .PHI..sub.2 ', complementary latched data outputs from the first and second data outputs, dout1 and dout2, generated by the voltage developing stage; and a voltage equalization stage which equalizes, in response to a control signal .PHI..sub.0 ', voltages on data lines respectively connected to the first and second data outputs, dout1 and dout2. In addition, the voltage equalization stage is used to initiate the voltage developing stage. Timing of the control signals, .PHI..sub.0 ' and .PHI..sub.2 ', is such that the control signal .PHI..
    Type: Grant
    Filed: May 1, 1995
    Date of Patent: August 13, 1996
    Assignee: Cirrus Logic, Inc.
    Inventors: Jyhfong Lin, Bruce Doyle