Patents by Inventor Bruce E. Deal

Bruce E. Deal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of selective etching native oxide
    Patent number: 5294568
    Abstract: A method of selective etching of native oxide on a substrate is disclosed in which hydrogen halide vapor and water vapor are exposed to the substrate surface under appropriate conditions and long enough to remove native oxide but not long enough to remove any significant amount of other oxides. Treating conditions are maintained to prevent water vapor from condensing on the substrate until sufficient native oxide is etched so that substantially all the native oxide will be etched before appreciable other oxides are etched.
    Type: Grant
    Filed: April 10, 1992
    Date of Patent: March 15, 1994
    Assignee: Genus, Inc.
    Inventors: Michael A. McNeilly, Bruce E. Deal, Dah-Bin Kao, John de Larios
  • Binary germanium-silicon interconnect and electrode structure for integrated circuits
    Patent number: 4442449
    Abstract: An interconnect structure for use in integrated circuits comprises a germanium-silicon binary alloy. Such an alloy is deposited on the semiconductor wafer from the co-deposition of germanium and silicon using chemical vapor deposition techniques of a type commonly used in the semiconductor industry. The resulting alloy can be oxidized, selectively removed and doped with selected impurities to provide a conductive lead pattern of a desired shape on the surface of a wafer.
    Type: Grant
    Filed: March 16, 1981
    Date of Patent: April 10, 1984
    Assignee: Fairchild Camera and Instrument Corp.
    Inventors: William I. Lehrer, Bruce E. Deal
  • Complementary insulated gate field effect transistor structure and process for fabricating the structure
    Patent number: 4027380
    Abstract: A complementary insulated gate field effect transistor structure having complementary p-channel and n-channel devices in the same semiconductor substrate and a process for fabricating the structure incorporate oxide isolation of the active device regions, counterdoping of the p-well with impurities of opposite type to obtain a composite doping profile, reduction of Q.sub.ss in the isolation oxide, doping of the gate and field oxides with a chlorine species and phosphorus doping of the polycrystalline silicon gates.
    Type: Grant
    Filed: January 16, 1976
    Date of Patent: June 7, 1977
    Assignee: Fairchild Camera and Instrument Corporation
    Inventors: Bruce E. Deal, Daniel C. Hu