Abstract: A DMA controller capable of conditional action under the control of a status register, prespecified parameters, and a condition field of the channel command, and a DMA controller which returns status information to command entry locations that are reserved for this purpose are disclosed. The prespecified parameters may be held in a register having a mask field and a value field, and a test for conditional action may be a masked comparison of the status register and the value field. The condition field determines how the test result is interpreted and allows suppressing or forcing the conditional action during a command.

Abstract: The present invention is therefore directed to enhancing the efficiency with which input/output controllers execute operations in response to requests from another device, such as a main controller. In accordance with exemplary embodiments, a compact set of status information signals is communicated from an input/output controller to a main controller such that the main controller can provide error control (that is, monitor input/output controller operation) without the use of interrupts. As a result, the main controller can sequentially and continuously supply multiple commands of a transaction to the input/output controller without the use of a multiple hardware interrupts. System hardware can therefore be used more efficiently and input/output controller operation can be accelerated, thereby increasing system performance.