Abstract: A first-in first-out buffer memory with improved status flags to indicate not only memory empty and memory full conditions, but to further indicate conditions such as almost empty, almost full and half-full is disclosed. To generate the flags, counters continuously count the number of write and read operations, with a subtractor coupled thereto providing as an output the difference between the two counts. Time delay circuits initiated by write or read operations provide time delays sufficient to enable the counters and the subtractor to settle before clocking the result into a latch. The output of the latch is decoded, with a further time delay circuit clocking the decoder output thereinto to provide output signals for the foregoing status flags. The use of the time delay circuits and the clocking of status flags avoids any significant flag invalid time, making the flag signals constantly monitorable without regard to the timing of read and write operations.

Abstract: A fast EPROM programmable logic array cell utilizing a MOSFET to drive the output of the EPROM array cell which is coupled to a product term. The MOSFET has a current path which is coupled to the product term to modulate the binary status of the product term under control of an MOS EPROM field effect transistor which is coupled to the MOSFET. The MOSFET is other than an EPROM field effect transistor.