Abstract: A dual loop system for the acquisition and tracking of a carrier signal is presented. The acquisition loop uses a bang-bang phase detector which permits the carrier to be acquired without a clock reference. Once acquired, the carrier is then tracked with a loop using a Hogge phase detector. The tracking loop is autoscaling, so that loop gain and bandwidth are responsive to the carrier signal frequency. The autoscaling feature of the tracking loop and the uniform gain of the acquisition loop permit the same loop filter to be shared by both loops. A method implementing the above-described dual-loop system is also presented.

Abstract: An integrated circuit device and method for synthesis of a signal having a desired frequency and low noise. The integrated circuit embodiment of the invention generally includes a phase locked loop (PLL) circuit used in conjunction with a frequency multiplier. Specifically, the integrated circuit embodiment includes a frequency multiplier connected to a first input of a phase detector, a low pass filter connected between the output of the phase detector and the input of a voltage controlled oscillator (VCO), and a frequency divider connected between the output of the VCO and a second input to the phase detector. The frequency multiplier produces a signal having a frequency that is a multiple of the frequency of a reference signal which is connected to the input of the frequency multiplier. For any desired output frequency, use of the multiplier results in a smaller divider ratio "n" in the PLL, thereby reducing the closed loop noise inside the PLL loop bandwidth.

Abstract: An analog delay circuit provide a current-dependent delay through two differential pairs of transistors operated in parallel, one with input resistors, the other without. Delay is varied through the delay stage by provision of complementary currents produced by a current DAC in response to digital code provided in a data bus. The complementary currents drive the differential pairs to various combinations of operations, which yields the desired variable delay.

Abstract: A method and apparatus for providing ECL output signals to a capacitative load includes differential amplification of input signals with a first output of a differential amplifier connected for establishing a voltage level between voltage limits V.sub.cc and V.sub.ee at the output of an output driver in response to variations in the first amplifier output. A pull-down transistor has a collector connected to the output driver output, an emitter connected to the V.sub.ee voltage source, and a base coupled through a boost capacitor to the second amplifier output. A voltage clamp embracing a clamp transistor with a base connected to receive a predetermined control voltage has an emitter connected to the boost capacitor and the pull-down transistor base and a collector connected to the V.sub.cc voltage source. The clamp transistor is operated in Darlington configuration to provide a minimum discharge impedence to the base of the pull-down transistor.

Abstract: A method and apparatus for providing ECL output signals to a capacitative load includes differential amplification of input signals with a first output of a differential amplifier connected for establishing a voltage level between voltage limits V.sub.cc and V.sub.ee at the output of an output driver in response to variations in the first amplifier output. A pull-down transistor has a collector connected to the output driver output, an emitter connected to the V.sub.ee voltage source, and a base coupled through a boost capacitor to the second amplifier output. A voltage clamp embracing a clamp transistor with a base connected to receive a predetermined control voltage has an emitter connected to the boost capacitor and the pull-down transistor base and a collector connected to the V.sub.cc voltage source. The clamp transistor is operated in Darlington configuration to provide a minimum discharge impedence to the base of the pull-down transistor.

Abstract: The described embodiment of the present invention provides an output drive circuit having an input circuit comprising a differentially coupled pair of transistors. The output of the differentially paired transistors is provided to a pair of output driver transistors connected in a Darlington or a common collector-common emitter configuration which provides an output pull up signal to an output pin of the integrated circuit containing the described output driver. The opposite output of the differentially coupled pair is provided to a circuit which provides a pull down pulse to quickly shut off the transistor pair during the high to low transition of the output driver transistor. The use of the output driver transistor driver minimizes the current required by the differential pair and the fast pull down circuit eliminates the speed disadvantage of using a transistor pair output driver.