Patents by Inventor Bruce Hancock
Bruce Hancock has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9008933Abstract: A system includes a monitoring module, a congestion module, a modification module, and a communication module. The monitoring module monitors vehicles in a transportation network. The congestion module calculates a throughput parameter that is representative of a statistical measure of adherence to a movement plan by the vehicles. The modification module determines a confidence parameter representative of a probability that changing the original meet event does not reduce the throughput parameter. The modification module modifies the original meet event to an updated meet event when the confidence parameter exceeds a predetermined threshold. The communication module transmits the updated meet event to the yielding vehicle and/or the passing vehicle, for the yielding vehicle and/or the passing vehicle to receive the updated meet event from the communication module and change a speed of the yielding vehicle or the passing rail vehicle to arrive at the updated meet event.Type: GrantFiled: November 30, 2011Date of Patent: April 14, 2015Assignee: General Electric CompanyInventors: Jared Cooper, Mitchell Scott Wills, Kevin Campbell, John McElroy, Jian Li, Bruce Hancock, Sherri Boyd, Mason Samuels, Paul Denton, David Eldredge, Scott Dulmage
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Patent number: 8805605Abstract: A system is provided that includes a control unit configured to be disposed on-board at least one of a first vehicle or a second vehicle. The control unit also is configured to receive an updated time of an event involving the first vehicle and the second vehicle traveling in a transportation network. The control unit also is configured to change a speed of said at least one of the first vehicle or the second vehicle in response to the updated time to arrive at the event. A method is provided that includes, at one of a first vehicle or a second vehicle, receiving an updated time of an event involving the first vehicle and the second vehicle in a transportation network. The method also includes changing a speed of said one of the first vehicle or the second vehicle in response to the updated tune to arrive at the event.Type: GrantFiled: November 30, 2011Date of Patent: August 12, 2014Assignee: General Electric CompanyInventors: Jared Cooper, Mitchell Scott Wills, Kevin Campbell, John McElroy, Jian Li, Bruce Hancock, Sherri Boyd, Mason Samuels, Paul Denton, David Eldredge, Scott Dulmage
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Publication number: 20120290182Abstract: A system includes a monitoring module, a congestion module, a modification module, and a communication module. The monitoring module monitors vehicles in a transportation network. The congestion module calculates a throughput parameter that is representative of a statistical measure of adherence to a movement plan by the vehicles. The modification module determines a confidence parameter representative of a probability that changing the original meet event does not reduce the throughput parameter. The modification module modifies the original meet event to an updated meet event when the confidence parameter exceeds a predetermined threshold. The communication module transmits the updated meet event to the yielding vehicle and/or the passing vehicle, for the yielding vehicle and/or the passing vehicle to receive the updated meet event from the communication module and change a speed of the yielding vehicle or the passing rail vehicle to arrive at the updated meet event.Type: ApplicationFiled: November 30, 2011Publication date: November 15, 2012Inventors: Jared COOPER, Mitchell Scott Wills, Kevin Campbell, John McElroy, Jian Li, Bruce Hancock, Sherri Boyd, Mason Samuels, Paul Denton, David Eldredge, Scott Dulmage
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Publication number: 20120290185Abstract: A system is provided that includes a control unit configured to be disposed on-board at least one of a first vehicle or a second vehicle. The control unit also is configured to receive an updated time of an event involving the first vehicle and the second vehicle traveling in a transportation network. The control unit also is configured to change a speed of said at least one of the first vehicle or the second vehicle in response to the updated time to arrive at the event. A method is provided that includes, at one of a first vehicle or a second vehicle, receiving an updated time of an event involving the first vehicle and the second vehicle in a transportation network. The method also includes changing a speed of said one of the first vehicle or the second vehicle in response to the updated tune to arrive at the event.Type: ApplicationFiled: November 30, 2011Publication date: November 15, 2012Inventors: Jared Cooper, Mitchell Scott Wills, Kevin Campbell, John McElroy, Jian Li, Bruce Hancock, Sherri Boyd, Mason Samuels, Paul Denton, David Eldredge, Scott Dulmage
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Patent number: 8164663Abstract: For a source-follower signal chain, the ohmic drop in the selection switch causes unacceptable voltage offset, non-linearity, and reduced small signal gain. For an op amp signal chain, the required bias current and the output noise rises rapidly with increasing the array format due to a rapid increase in the effective capacitance caused by the Miller effect boosting up the contribution of the bus capacitance. A new switched source-follower signal chain circuit overcomes limitations of existing op-amp based or source follower based circuits used in column multiplexers and data readout. This will improve performance of CMOS imagers, and focal plane read-out integrated circuits for detectors of infrared or ultraviolet light.Type: GrantFiled: June 16, 2006Date of Patent: April 24, 2012Assignee: California Institute of TechnologyInventors: Bedabrata Pain, Bruce Hancock, Thomas J. Cunningham
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Patent number: 7746383Abstract: The present invention provides a CMOS imager with a reset scheme, by which a CMOS imager generates a sub-kTC noise so that read noise does not depend on the sense node capacitance. By using a column feedback circuit, reset noise can be suppressed to a negligible amount so that photogate APS or CCD-like circuits can achieve noise performance to very efficient value. This scheme allows increasing sense node capacitance without increasing the noise and also achieves a large full-well value without sacrificing read noise performance. The feedback circuit in one of the embodiment of the present invention is located at the column side of the circuit. This design provides a minimal change to the pixel. As a result quantum efficiency or pixel size is not compromised. The present invention allows a CMOS imager to capture scene with high intra-scene contracts under low illumination with high dynamic range.Type: GrantFiled: February 12, 2004Date of Patent: June 29, 2010Assignee: California Institute of TechnologyInventors: Bedabrata Pain, Thomas J. Cunningham, Bruce Hancock, Suresh Seshadri, Monico Ortiz, Guang Yang
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Publication number: 20070012870Abstract: For a source-follower signal chain, the ohmic drop in the selection switch causes unacceptable voltage offset, non-linearity, and reduced small signal gain. For an op amp signal chain, the required bias current and the output noise rises rapidly with increasing the array format due to a rapid increase in the effective capacitance caused by the Miller effect boosting up the contribution of the bus capacitance. A new switched source-follower signal chain circuit overcomes limitations of existing op-amp based or source follower based circuits used in column multiplexers and data readout. This will improve performance of CMOS imagers, and focal plane read-out integrated circuits for detectors of infrared or ultraviolet light.Type: ApplicationFiled: June 16, 2006Publication date: January 18, 2007Inventors: Bedabrata Pain, Bruce Hancock, Thomas Cunningham
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Patent number: 7019345Abstract: The present invention provides a CMOS imager with a reset scheme, by which a CMOS imager generates a sub-kTC noise so that read noise does not depend on the sense node capacitance. By using a column feedback circuit, reset noise can be suppressed to a negligible amount so that photogate APS or CCD-like circuits can achieve noise performance to very efficient value. This scheme allows increasing sense node capacitance without increasing the noise and also achieves a large full-well value without sacrificing read noise performance. The feedback circuit in one of the embodiment of the present invention is located at the column side of the circuit. This design provides a minimal change to the pixel. As a result quantum efficiency or pixel size is not compromised. The present invention allows a CMOS imager to capture scene with high intra-scene contracts under low illumination with high dynamic range.Type: GrantFiled: November 16, 2001Date of Patent: March 28, 2006Assignee: California Institute of TechnologyInventors: Bedabrata Pain, Thomas J. Cunningham, Bruce Hancock, Suresh Seshadri, Monico Ortiz, Guang Yang
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Publication number: 20060023092Abstract: A multiple-step reset process and circuit for resetting a voltage stored on a photodiode of an imaging device. A first stage of the reset occurs while a source and a drain of a pixel source-follower transistor are held at ground potential and the photodiode and a gate of the pixel source-follower transistor are charged to an initial reset voltage having potential less that of a supply voltage. A second stage of the reset occurs after the initial reset voltage is stored on the photodiode and the gate of the pixel source-follower transistor and the source and drain voltages of the pixel source-follower transistor are released from ground potential thereby allowing the source and drain voltages of the pixel source-follower transistor to assume ordinary values above ground potential and resulting in a capacitive feed-through effect that increases the voltage on the photodiode to a value greater than the initial reset voltage.Type: ApplicationFiled: July 27, 2005Publication date: February 2, 2006Inventors: Bedabrata Pain, Thomas Cunningham, Bruce Hancock
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Publication number: 20050243302Abstract: A two-dimensional range-imaging system is capable of transmitting light from a source into a field of view and focusing return portions of the light, reflected off targets in the field of view, onto a two-dimensional array of photodetectors. The photodectectors convert the return portions of light into electric signals that are compatible with a solid state circuit. Each electric signal is combined with a one or more reference signals to indicate a distance between the source and an associated target.Type: ApplicationFiled: January 20, 2005Publication date: November 3, 2005Inventors: Bedabrata Pain, Bruce Hancock
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Publication number: 20040169740Abstract: The present invention provides a CMOS imager with a reset scheme, by which a CMOS imager generates a sub-kTC noise so that read noise does not depend on the sense node capacitance. By using a column feedback circuit, reset noise can be suppressed to a negligible amount so that photogate APS or CCD-like circuits can achieve noise performance to very efficient value. This scheme allows increasing sense node capacitance without increasing the noise and also achieves a large full-well value without sacrificing read noise performance. The feedback circuit in one of the embodiment of the present invention is located at the column side of the circuit. This design provides a minimal change to the pixel. As a result quantum efficiency or pixel size is not compromised. The present invention allows a CMOS imager to capture scene with high intra-scene contracts under low illumination with high dynamic range.Type: ApplicationFiled: February 12, 2004Publication date: September 2, 2004Inventors: Bedabrata Pain, Thomas J. Cunningham, Bruce Hancock, Suresh Seshadri, Monico Ortiz, Guang Yang
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Patent number: 6721464Abstract: A centroid computation system is disclosed. The system has an imager array, a switching network, computation elements, and a divider circuit. The imager array has columns and rows of pixels. The switching network is adapted to receive pixel signals from the image array. The plurality of computation elements operates to compute inner products for at least x and y centroids. The plurality of computation elements has only passive elements to provide inner products of pixel signals the switching network. The divider circuit is adapted to receive the inner products and compute the x and y centroids.Type: GrantFiled: January 3, 2003Date of Patent: April 13, 2004Assignee: California Institute of TechnologyInventors: Bedabrata Pain, Chao Sun, Guang Yang, Thomas J. Cunningham, Bruce Hancock
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Publication number: 20030133625Abstract: A centroid computation system is disclosed. The system has an imager array, a switching network, computation elements, and a divider circuit. The imager array has columns and rows of pixels. The switching network is adapted to receive pixel signals from the image array. The plurality of computation elements operates to compute inner products for at least x and y centroids. The plurality of computation elements has only passive elements to provide inner products of pixel signals the switching network. The divider circuit is adapted to receive the inner products and compute the x and y centroids.Type: ApplicationFiled: January 3, 2003Publication date: July 17, 2003Applicant: California Institute of TechnologyInventors: Bedabrata Pain, Chao Sun, Guang Yang, Thomas J. Cunningham, Bruce Hancock
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Patent number: 6519371Abstract: A centroid computation system is disclosed. The system has an imager array, a switching network, computation elements, and a divider circuit. The imager array has columns and rows of pixels. The switching network is adapted to receive pixel signals from the image array. The plurality of computation elements operates to compute inner products for at least x and y centroids. The plurality of computation elements has only passive elements to provide inner products of pixel signals the switching network. The divider circuit is adapted to receive the inner products and compute the x and y centroids.Type: GrantFiled: October 2, 2000Date of Patent: February 11, 2003Assignee: California Institute of TechnologyInventors: Bedabrata Pain, Chao Sun, Guang Yang, Thomas J. Cunningham, Bruce Hancock
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Publication number: 20020182788Abstract: The present invention provides a CMOS imager with a reset scheme, by which a CMOS imager generates a sub-kTC noise so that read noise does not depend on the sense node capacitance. By using a column feedback circuit, reset noise can be suppressed to a negligible amount so that photogate APS or CCD-like circuits can achieve noise performance to very efficient value. This scheme allows increasing sense node capacitance without increasing the noise and also achieves a large full-well value without sacrificing read noise performance. The feedback circuit in one of the embodiment of the present invention is located at the column side of the circuit. This design provides a minimal change to the pixel. As a result quantum efficiency or pixel size is not compromised. The present invention allows a CMOS imager to capture scene with high intra-scene contracts under low illumination with high dynamic range.Type: ApplicationFiled: November 16, 2001Publication date: December 5, 2002Inventors: Bedabrata Pain, Thomas J. Cunningham, Bruce Hancock, Suresh Seshadri, Monico Ortiz
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Patent number: D494373Type: GrantFiled: June 10, 2003Date of Patent: August 17, 2004Assignee: Cene Design LimitedInventor: Matthew Bruce Hancock