Abstract: A recombinant immune cell expresses a heterologous IgG Fc receptor. In some embodiments, the heterologous IgG Fc receptor can be a chimeric IgG Fc receptor. Generally, the chimeric IgG Fc receptor includes an extracellular domain, a transmembrane domain, and an intracellular domain. The extracellular domain generally includes a sufficient portion of CD64 to bind to an IgG Fc region. The intracellular domain of the chimeric IgG Fc receptor includes a sufficient portion of an Fc receptor allowing immunoreceptor tyrosine-based activation motif (ITAM) to initiate cell signaling when an IgG Fc region binds to the extracellular domain.

Abstract: Disclosed are small molecule inhibitors of ?v?6 integrin, and methods of using them to treat a number of specific diseases or conditions.

Abstract: An instrumented sensor subsystem power supply for use in hydrocarbon drilling operations. The system includes an external internal power supply, wired to an external conductive coil. In addition, an instrumented sensor subsystem is installed on an oilfield component adapted for use in a wellbore. The instrumented sensor subsystem includes an internal inductive coil and an internal power storage unit, and creates a magnetic flux region between the internal and external conductive coils when both are in close proximity. The instrumented sensor subsystem also includes a measurement sensor electrically connected to the internal power storage unit and conductive coil.

Abstract: A method for calibrating a system in an oilfield. The method involves operating a component which includes both a direct sensor and an indirect sensor. Additionally, a processing-capable calibration unit in installed on the system and receives signals from the direct sensor and the indirect sensor. After the indirect sensor calculates indirect physical measurements and the direct sensor calculates direct physical measurements, the calibration unit compares the indirect physical measurements with the direct measurements and determines the difference between them. The calibration unit then computes a calibration command and communicates it to the indirect sensor, which uses this command to adjust its future indirect measurements.

Abstract: A method for removal of fluid from a subterranean formation is provided, the method including the steps of: providing a wellbore from the surface to within the formation: providing a pump in the wellbore capable of removing fluid from the wellbore to a surface location; establishing a pump performance function as pump curves; measuring at least one variable that establishes where the pump is operating on the pump curve; determining the differential pressure across the pump from the measured variable and the digital power and the flow rate; determining the suction side pressure from the differential pressure across the pump and the vertical height of the annular fluid column of the fluid column above the pump; determining the suction side fluid level from the suction side pressure and the fluid density.

Abstract: Subscribers are notified of selected incoming events, such as fax or a memo. Subscriber profiles, stored in a database, contain data concerning at least one specified event of which a subscriber wishes to be notified and a procedure by which the subscriber prefers to be notified. When an incoming event occurs (200) data is extracted (205) from the incoming event and the database is queried (210) using the extracted data to identify at least one subscriber whose subscriber profile includes at least one item of the extracted data and the procedure by which the identified subscriber prefers to be notified (215) of the incoming event. An event notification is then prepared (220) for the incoming event in accordance with the determined procedure for the identified subscriber and the event notification is sent (225) to the identified subscriber in accordance with the determined procedure.

Abstract: Embodiments of the invention provide a system for supporting numerous multiplexed and demultiplexed T1 signals and additional Ethernet signals between two DS-3 signals. In an embodiment, the multiplexer device is housed within a single rack unit on a standard 19? or 23? rack. In a further embodiment, all T1, Ethernet, alarm driver, and power connections are made from the front of the multiplexer unit, allowing easier access to the device connections restricted spaces. In a further embodiment, the system provides redundancy for the T3, T1, and Ethernet circuits, allowing error remediation. The system may also allow error detection for the associated telecommunications network.

Abstract: A computer readable medium for validating data is disclosed. The computer readable medium provides a computer readable medium with instructions executable by a computer to cause the computer to perform the following functions: receive a subjective representation of an address; re-format the subjective representation of the address according to a set of standardization rules; locate one or more candidate representations of the address from source data by recognizing that a preferred token is present among any of the one or more candidate representations of the address; select a preferred representation of the address from among the one or more candidate representations of the address based on the presence of the preferred token; and communicate the preferred representation of the address to an interface.

Abstract: A system and method are provided for adjusting the phase output of a Hogge phase detector. The method comprises: using a Hogge phase detector, generating a reference signal; using the Hogge phase detector, generating a phase and reference signals; accepting an adjust signal; modifying the amplitude of the phase signal in response to the adjust signal; integrating the amplitude modified phase signal; using the integrated signal as a phase adjusted signal; integrating the reference signal; using the integrated reference signal and phase adjusted signal to generate a voltage controlled oscillator (VCO) signal; at the Hogge phase detector, accepting the VCO signal as the clock signal. Some aspects of the method further comprise: using the VCO signal to sample data at a settled first phase of the clock; changing the adjust signal; and, using the VCO signal to sample data at a settled second phase of the clock.

Abstract: In a computer network comprising a Central System, Internet Protocol (IP) based network, one or more parallel Application Systems and one or more End Devices wherein the End Device receives an IP address and device configuration information from IP Address Server associated with the Central System, a central computer based system identifies one or more End Devices by their unique physical address, and based on that physical address, determines how an individual End Device and other network elements and applications should be configured to ensure that traffic is routed between the end device and a specific Application System. Aspects of an Application System may include a computer system or autonomous network of computers. When an IP Address Server is configured with Physical Address Routing, the IP Address Server can dynamically identify the Application System to which an End Device belongs and provide that End Device with configuration and routing instructions.

Abstract: A data structure, database management system, and methods of validating data are disclosed. A data structure is described that includes a superset of interconnected relational databases containing multiple tables having a common data structure. The tables may be stored as a sparse matrix linked list. A method is disclosed for ordering records in hierarchical order, in a series of levels from general to specific. An example use with address databases is described, including a method for converting an input address having a subject representation into an output address having a preferred representation. Preferred artifacts may be marked with a token. Alias tables may be included. This Abstract is provided to comply with the rules, which require an abstract to quickly inform a searcher or other reader about the subject matter of the application. This Abstract is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

Abstract: The invention is directed towards constructs for RNAi techniques. The invention provides a ribonucleic acid (RNA) for use as interfering RNA in gene silencing techniques to silence a target gene comprising in a 5? to 3? direction at least a first effector sequence, a second effector sequence, a sequence substantially complementary to the second effector sequence and a sequence substantially complementary to the first effector sequence, wherein the complementary sequences are capable of forming double stranded regions with their respective effector sequences and wherein at least one of these sequences is substantially identical to the predicted transcript of a region of the target gene, and a nucleic acid construct encoding such an RNA.

Abstract: A system and method are provided for measuring amplifier gain in a digital network. The method includes accepting a digital input signal; amplifying the input signal (Vin); comparing the amplified signal to dc thresholds; measuring output errors; and, calculating the amplifier gain in response to the thresholds. More specifically, accepting a digital input signal includes accepting an input signal having an amplitude. Comparing the amplified signal to dc thresholds includes comparing the amplified signal to a low threshold and a high threshold. Measuring errors includes measuring a predetermined error condition in response to the high threshold and the low threshold. Then, calculating the amplifier gain in response to the thresholds includes calculating the amplifier gain in response to the high threshold, the low threshold, and the input signal amplitude.

Abstract: A system and method are provided for compensating a comparator threshold level. The method comprises: accepting an input signal with an ac component; lowpass filtering the input signal to generate the input signal average voltage; accepting the input signal average voltage; accepting a first dc level; summing the average voltage with the first dc level; supplying a first sum as a first comparator threshold level; comparing the input signal to the first comparator threshold level; and, supplying a first comparator output signal with an ac component. In some aspects of the method, accepting a first dc level includes accepting a plurality of dc levels. Then, the average voltage is summed with each of the plurality of dc levels and supplied as a corresponding plurality of comparator threshold levels. The input signal is compared to each of the comparator threshold levels and a plurality of comparator output signals are supplied.

Abstract: A sweeping device (1) having an actuating means (6), including a surface contacting means (2), a handle (3) connected to the surface contacting means and a friction reducing means (4, 7), in which the friction reducing means is adapted to enable the lifting of the surface contacting means of the sweeping device from the surface being swept or scraped upon user actuation of the actuating means (6).

Abstract: A system and method are provided for controlling the phase of a voltage controlled oscillator output. The method comprises: accepting a plurality of VCO outputs coarsely differentiated by phase; selecting one of the VCO outputs; finely modifying the phase of the selected VCO output; and, supplying the phase modified VCO output. In one aspect, accepting VCO outputs coarsely differentiated by phase includes: accepting a first VCO output (I0); accepting a second VCO output (I1), differentiated approximately 90 degrees from the first VCO output; accepting a third VCO output (Q0), differentiated approximately 90 degrees from the second VCO output; and, accepting a fourth VCO output (Q1), differentiated approximately 90 degrees from the third VCO output. Finely modifying the phase of the selected VCO output includes modifying the selected VCO output in the range between +45 and −45 degrees. In one aspect, the output is modified in 16 discrete steps.

Abstract: A system and method are provided for reducing the threshold bias offset voltage in a comparator, by canceling and bypassing the bias offset current errors. The comparator system comprises amplification stages with bias cancellation circuitry and a threshold setting circuit. The bias offset current cancellation circuit is used to cancel the base current of differential amplifier input emitter follower. The bias offset current cancellation circuit also cancels the loading effect of amplifier input emitter-follower driving stage. The threshold offset voltage is further reduced by the threshold setting circuit. The threshold-setting circuit includes two integrators and a unit gain operation amplifier. The integrators have the input accept a single-ended input signal, an output connected to the negative input of the comparator, and an output connected to the unit gain operational amplifier, whose output is connected to the negative input of the comparator.

Abstract: A ramp circuit discharges an output capacitor to generate a substantially linear ramp signal, current injection is used to stabilize the ramp's output, reducing overshooting and ringing. With faster output stabilization, the ramp exhibits significantly faster repetition rates suitable testing high speed components such as RAM, microprocessors, high speed logic, and the like. The ramp includes an output transistor, with its output defining an output node coupled to a current source and a charge storage device such as a capacitor. The charge storage device charges when the transistor is "on". Namely, when the transistor is turned on, the output charge storage device is coupled to a reference voltage, which charges the device in a fixed time. When the transistor is turned "off", the charge storage device discharges, aided by the flow of current through the current source, resulting in the linear ramp signal.

Abstract: A timing vernier repeatedly generates a timing output signal, which includes a timing event such as a state transition, pulse, etc. Unlike prior timing verniers, the present timing event is capable of significantly faster repetition rates. After the ramp signal is initiated responsive to a trigger signal, it changes from a predetermined starting level at a predetermined substantially linear rate. A digital-to-analog converter (DAC) provides an analog timing select signal and a reset select signal responsive to a digital timing select signal. The reset select signal represents the current timing select signal offset by a predetermined amount. A comparator, coupled to the ramp and the DAC, produces the timing event when the ramp output signal reaches the analog timing select signal. Thus, greater analog timing select signals cause earlier timing events, whereas lesser timing select signals result in later timing events. The delay of the timing event is directly proportional to the analog timing select signal.

Abstract: A ramp circuit repeatedly generates a substantially linear ramp signal. Ramp switch junction capacitance that otherwise causes a nonlinear output is compensated to improve signal linearity and enable faster retriggering. The ramp includes an output transistor, with its output coupled to a current source and a charge storage device. The output charge storage device charges when the transistor is on. When the transistor is turned off, the output charge storage device discharges, resulting in the changing ramp signal. The output transistor inherently includes a junction capacitance, which causes a nonlinearity in the discharge of the charge storage device. This nonlinearity appears as a quick drop in the ramp signal relative to the slower rate of steady-state decrease. This nonlinearity is prevented, however, by compensating for the output transistor's junction capacitance.