Abstract: A switching regulator provides programming output current control through a single input terminal by modifying the reference voltage in the control loop of the switching regulator. The switching regulator includes a first input terminal receiving a program input voltage indicative of a desired output current, a voltage divider receiving a first reference voltage and providing a second reference voltage at a first node between the first and second resistors and a third reference voltage at a second node between the second and third resistors, and a precision active pulldown circuit coupled to receive the program input voltage and operative to pull down the second reference voltage at the first node in response to the program input voltage. In operation, the third reference voltage is used in the control loop of the switching regulator to control the output current of the switching regulator in response to the program input voltage.

Abstract: An integrated power switch is disclosed. The power switch comprises a power transistor for providing an output current. The power transistor includes a grounded body. The power switch includes a sense transistor coupled to the power transistor. The sense transistor includes a floating body. The power switch further includes a resistor coupled to the floating body of the sense transistor. A value of the resistor is chosen such that the output current is regulated at a predetermined level. Accordingly, a power switch in accordance with the present invention includes a power transistor which is implemented with grounded body and its companion sense transistor is implemented with floating body. Higher operating voltages can be achieved by turning on the parasitic transistor inside the sense transistor with a resistor connected from its body to ground. The impact ionization current of the power and sense transistors are included in the current limit loop control.

Abstract: The present invention provides an apparatus and method for preventing damage to a system due to runaway current and provides for the reactivation of the system. The shutdown and reactivation method and apparatus includes a driving circuit which supplies an output current to a load. If a runaway current condition occurs in the system the shutdown and reactivation apparatus is activated by triggering a shutdown signal which deactivates the driving circuit such that the output current is no longer supplied to the load. The shutdown signal activates a charging circuit, which supplies a charging current to the load. A first monitoring circuit is coupled with the load, and configured to monitor an output voltage across the load when the shutdown and reactivation apparatus is in the active state.

Abstract: The present invention provides an apparatus and method for preventing damage to a system due to runaway current and provides for the reactivation of the system. The shutdown and reactivation method and apparatus includes a driving circuit which supplies an output current to a load. If a runaway current condition occurs in the system the shutdown and reactivation apparatus is activated by triggering a shutdown signal which deactivates the driving circuit such that the output current is no longer supplied to the load. The shutdown signal activates a charging circuit, which supplies a charging current to the load. A first monitoring circuit is coupled with the load, and configured to monitor an output voltage across the load when the shutdown and reactivation apparatus is in the active state.

Abstract: An improved power interface device suitable for managing power for a PCMCIA card is disclosed which includes internal charge pumps, to gradually turn on the device's internal N-channel MOSFETs, and a first discharge circuit for gradually turning off the N-channel MOSFETs. The first discharge circuit includes an MOS capacitor that incrementally discharges the gates of the N-channel MOSFETs such that the turn-off speed of each N-channel MOSFET is controlled by the ratio of the capacitances of the capacitor and the MOSFET's gate. A second discharge circuit includes a capacitor and is used to gradually turn on the interface device's internal P-channel MOSFET by incrementally charging its gate. The turn-on speed of the P-channel MOSFET is controlled by the ratio of the capacitances of this capacitor and the MOSFET's gate. In another embodiment, diode clamps are provided to protect the interface device's N-channel MOSFETs against time dependent breakdown.